1 /* 2 * (C) Copyright 2015 Google, Inc 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <debug_uart.h> 9 #include <dm.h> 10 #include <fdtdec.h> 11 #include <led.h> 12 #include <malloc.h> 13 #include <ram.h> 14 #include <spl.h> 15 #include <asm/gpio.h> 16 #include <asm/io.h> 17 #include <asm/arch/clock.h> 18 #include <asm/arch/hardware.h> 19 #include <asm/arch/periph.h> 20 #include <asm/arch/sdram.h> 21 #include <asm/arch/timer.h> 22 #include <dm/pinctrl.h> 23 #include <dm/root.h> 24 #include <dm/test.h> 25 #include <dm/util.h> 26 #include <power/regulator.h> 27 28 DECLARE_GLOBAL_DATA_PTR; 29 30 u32 spl_boot_device(void) 31 { 32 const void *blob = gd->fdt_blob; 33 struct udevice *dev; 34 const char *bootdev; 35 int node; 36 int ret; 37 38 bootdev = fdtdec_get_config_string(blob, "u-boot,boot0"); 39 debug("Boot device %s\n", bootdev); 40 if (!bootdev) 41 goto fallback; 42 43 node = fdt_path_offset(blob, bootdev); 44 if (node < 0) { 45 debug("node=%d\n", node); 46 goto fallback; 47 } 48 ret = device_get_global_by_of_offset(node, &dev); 49 if (ret) { 50 debug("device at node %s/%d not found: %d\n", bootdev, node, 51 ret); 52 goto fallback; 53 } 54 debug("Found device %s\n", dev->name); 55 switch (device_get_uclass_id(dev)) { 56 case UCLASS_SPI_FLASH: 57 return BOOT_DEVICE_SPI; 58 case UCLASS_MMC: 59 return BOOT_DEVICE_MMC1; 60 default: 61 debug("Booting from device uclass '%s' not supported\n", 62 dev_get_uclass_name(dev)); 63 } 64 65 fallback: 66 return BOOT_DEVICE_MMC1; 67 } 68 69 u32 spl_boot_mode(void) 70 { 71 return MMCSD_MODE_RAW; 72 } 73 74 /* read L2 control register (L2CTLR) */ 75 static inline uint32_t read_l2ctlr(void) 76 { 77 uint32_t val = 0; 78 79 asm volatile ("mrc p15, 1, %0, c9, c0, 2" : "=r" (val)); 80 81 return val; 82 } 83 84 /* write L2 control register (L2CTLR) */ 85 static inline void write_l2ctlr(uint32_t val) 86 { 87 /* 88 * Note: L2CTLR can only be written when the L2 memory system 89 * is idle, ie before the MMU is enabled. 90 */ 91 asm volatile("mcr p15, 1, %0, c9, c0, 2" : : "r" (val) : "memory"); 92 isb(); 93 } 94 95 static void configure_l2ctlr(void) 96 { 97 uint32_t l2ctlr; 98 99 l2ctlr = read_l2ctlr(); 100 l2ctlr &= 0xfffc0000; /* clear bit0~bit17 */ 101 102 /* 103 * Data RAM write latency: 2 cycles 104 * Data RAM read latency: 2 cycles 105 * Data RAM setup latency: 1 cycle 106 * Tag RAM write latency: 1 cycle 107 * Tag RAM read latency: 1 cycle 108 * Tag RAM setup latency: 1 cycle 109 */ 110 l2ctlr |= (1 << 3 | 1 << 0); 111 write_l2ctlr(l2ctlr); 112 } 113 114 #ifdef CONFIG_SPL_MMC_SUPPORT 115 static int configure_emmc(struct udevice *pinctrl) 116 { 117 #ifndef CONFIG_TARGET_ROCK2 118 struct gpio_desc desc; 119 int ret; 120 121 pinctrl_request_noflags(pinctrl, PERIPH_ID_EMMC); 122 123 /* 124 * TODO(sjg@chromium.org): Pick this up from device tree or perhaps 125 * use the EMMC_PWREN setting. 126 */ 127 ret = dm_gpio_lookup_name("D9", &desc); 128 if (ret) { 129 debug("gpio ret=%d\n", ret); 130 return ret; 131 } 132 ret = dm_gpio_request(&desc, "emmc_pwren"); 133 if (ret) { 134 debug("gpio_request ret=%d\n", ret); 135 return ret; 136 } 137 ret = dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT); 138 if (ret) { 139 debug("gpio dir ret=%d\n", ret); 140 return ret; 141 } 142 ret = dm_gpio_set_value(&desc, 1); 143 if (ret) { 144 debug("gpio value ret=%d\n", ret); 145 return ret; 146 } 147 #endif 148 149 return 0; 150 } 151 #endif 152 153 void board_init_f(ulong dummy) 154 { 155 struct udevice *pinctrl; 156 struct udevice *dev; 157 int ret; 158 159 /* Example code showing how to enable the debug UART on RK3288 */ 160 #ifdef EARLY_UART 161 #include <asm/arch/grf_rk3288.h> 162 /* Enable early UART on the RK3288 */ 163 #define GRF_BASE 0xff770000 164 struct rk3288_grf * const grf = (void *)GRF_BASE; 165 166 rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT | 167 GPIO7C6_MASK << GPIO7C6_SHIFT, 168 GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT | 169 GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT); 170 /* 171 * Debug UART can be used from here if required: 172 * 173 * debug_uart_init(); 174 * printch('a'); 175 * printhex8(0x1234); 176 * printascii("string"); 177 */ 178 debug_uart_init(); 179 #endif 180 181 ret = spl_init(); 182 if (ret) { 183 debug("spl_init() failed: %d\n", ret); 184 hang(); 185 } 186 187 rockchip_timer_init(); 188 configure_l2ctlr(); 189 190 ret = uclass_get_device(UCLASS_CLK, 0, &dev); 191 if (ret) { 192 debug("CLK init failed: %d\n", ret); 193 return; 194 } 195 196 ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); 197 if (ret) { 198 debug("Pinctrl init failed: %d\n", ret); 199 return; 200 } 201 202 ret = uclass_get_device(UCLASS_RAM, 0, &dev); 203 if (ret) { 204 debug("DRAM init failed: %d\n", ret); 205 return; 206 } 207 } 208 209 static int setup_led(void) 210 { 211 #ifdef CONFIG_SPL_LED 212 struct udevice *dev; 213 char *led_name; 214 int ret; 215 216 led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led"); 217 if (!led_name) 218 return 0; 219 ret = led_get_by_label(led_name, &dev); 220 if (ret) { 221 debug("%s: get=%d\n", __func__, ret); 222 return ret; 223 } 224 ret = led_set_on(dev, 1); 225 if (ret) 226 return ret; 227 #endif 228 229 return 0; 230 } 231 232 void spl_board_init(void) 233 { 234 struct udevice *pinctrl; 235 int ret; 236 237 ret = setup_led(); 238 239 if (ret) { 240 debug("LED ret=%d\n", ret); 241 hang(); 242 } 243 244 ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); 245 if (ret) { 246 debug("%s: Cannot find pinctrl device\n", __func__); 247 goto err; 248 } 249 #ifdef CONFIG_SPL_MMC_SUPPORT 250 ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD); 251 if (ret) { 252 debug("%s: Failed to set up SD card\n", __func__); 253 goto err; 254 } 255 ret = configure_emmc(pinctrl); 256 if (ret) { 257 debug("%s: Failed to set up eMMC\n", __func__); 258 goto err; 259 } 260 #endif 261 262 /* Enable debug UART */ 263 ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG); 264 if (ret) { 265 debug("%s: Failed to set up console UART\n", __func__); 266 goto err; 267 } 268 269 preloader_console_init(); 270 return; 271 err: 272 printf("spl_board_init: Error %d\n", ret); 273 274 /* No way to report error here */ 275 hang(); 276 } 277 278 void lowlevel_init(void) 279 { 280 } 281