xref: /openbmc/u-boot/arch/arm/mach-omap2/omap5/emif.c (revision 274bced8)
1 /*
2  * EMIF programming
3  *
4  * (C) Copyright 2010
5  * Texas Instruments, <www.ti.com>
6  *
7  * Aneesh V <aneesh@ti.com> for OMAP4
8  *
9  * SPDX-License-Identifier:	GPL-2.0+
10  */
11 
12 #include <common.h>
13 #include <asm/emif.h>
14 #include <asm/arch/sys_proto.h>
15 #include <asm/utils.h>
16 
17 #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
18 #define print_timing_reg(reg) debug(#reg" - 0x%08x\n", (reg))
19 static u32 *const T_num = (u32 *)OMAP_SRAM_SCRATCH_EMIF_T_NUM;
20 static u32 *const T_den = (u32 *)OMAP_SRAM_SCRATCH_EMIF_T_DEN;
21 #endif
22 
23 #ifdef CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
24 /* Base AC Timing values specified by JESD209-2 for 532MHz operation */
25 static const struct lpddr2_ac_timings timings_jedec_532_mhz = {
26 	.max_freq = 532000000,
27 	.RL = 8,
28 	.tRPab = 21,
29 	.tRCD = 18,
30 	.tWR = 15,
31 	.tRASmin = 42,
32 	.tRRD = 10,
33 	.tWTRx2 = 15,
34 	.tXSR = 140,
35 	.tXPx2 = 15,
36 	.tRFCab = 130,
37 	.tRTPx2 = 15,
38 	.tCKE = 3,
39 	.tCKESR = 15,
40 	.tZQCS = 90,
41 	.tZQCL = 360,
42 	.tZQINIT = 1000,
43 	.tDQSCKMAXx2 = 11,
44 	.tRASmax = 70,
45 	.tFAW = 50
46 };
47 
48 /*
49  * Min tCK values specified by JESD209-2
50  * Min tCK specifies the minimum duration of some AC timing parameters in terms
51  * of the number of cycles. If the calculated number of cycles based on the
52  * absolute time value is less than the min tCK value, min tCK value should
53  * be used instead. This typically happens at low frequencies.
54  */
55 static const struct lpddr2_min_tck min_tck_jedec = {
56 	.tRL = 3,
57 	.tRP_AB = 3,
58 	.tRCD = 3,
59 	.tWR = 3,
60 	.tRAS_MIN = 3,
61 	.tRRD = 2,
62 	.tWTR = 2,
63 	.tXP = 2,
64 	.tRTP = 2,
65 	.tCKE = 3,
66 	.tCKESR = 3,
67 	.tFAW = 8
68 };
69 
70 static const struct lpddr2_ac_timings const*
71 			jedec_ac_timings[MAX_NUM_SPEEDBINS] = {
72 	&timings_jedec_532_mhz
73 };
74 
75 static const struct lpddr2_device_timings jedec_default_timings = {
76 	.ac_timings = jedec_ac_timings,
77 	.min_tck = &min_tck_jedec
78 };
79 
80 void emif_get_device_timings(u32 emif_nr,
81 		const struct lpddr2_device_timings **cs0_device_timings,
82 		const struct lpddr2_device_timings **cs1_device_timings)
83 {
84 	/* Assume Identical devices on EMIF1 & EMIF2 */
85 	*cs0_device_timings = &jedec_default_timings;
86 	*cs1_device_timings = NULL;
87 }
88 #endif /* CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS */
89