1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Adaptive Body Bias programming sequence for OMAP5 family 4 * 5 * (C) Copyright 2013 6 * Texas Instruments, <www.ti.com> 7 * 8 * Andrii Tseglytskyi <andrii.tseglytskyi@ti.com> 9 */ 10 11 #include <common.h> 12 #include <asm/omap_common.h> 13 #include <asm/io.h> 14 15 /* 16 * Setup LDOVBB for OMAP5. 17 * On OMAP5+ some ABB settings are fused. They are handled 18 * in the following way: 19 * 20 * 1. corresponding EFUSE register contains ABB enable bit 21 * and VSET value 22 * 2. If ABB enable bit is set to 1, than ABB should be 23 * enabled, otherwise ABB should be disabled 24 * 3. If ABB is enabled, than VSET value should be copied 25 * to corresponding MUX control register 26 */ 27 s8 abb_setup_ldovbb(u32 fuse, u32 ldovbb) 28 { 29 u32 vset; 30 u32 fuse_enable_mask = OMAP5_PROD_ABB_FUSE_ENABLE_MASK; 31 u32 fuse_vset_mask = OMAP5_PROD_ABB_FUSE_VSET_MASK; 32 33 if (!is_omap54xx()) { 34 /* DRA7 */ 35 fuse_enable_mask = DRA7_ABB_FUSE_ENABLE_MASK; 36 fuse_vset_mask = DRA7_ABB_FUSE_VSET_MASK; 37 } 38 /* 39 * ABB parameters must be properly fused 40 * otherwise ABB should be disabled 41 */ 42 vset = readl(fuse); 43 if (!(vset & fuse_enable_mask)) 44 return -1; 45 46 /* prepare VSET value for LDOVBB mux register */ 47 vset &= fuse_vset_mask; 48 vset >>= ffs(fuse_vset_mask) - 1; 49 vset <<= ffs(OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK) - 1; 50 vset |= OMAP5_ABB_LDOVBBMPU_MUX_CTRL_MASK; 51 52 /* setup LDOVBB using fused value */ 53 clrsetbits_le32(ldovbb, OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK, vset); 54 55 return 0; 56 } 57