1 /* 2 * Adaptive Body Bias programming sequence for OMAP5 family 3 * 4 * (C) Copyright 2013 5 * Texas Instruments, <www.ti.com> 6 * 7 * Andrii Tseglytskyi <andrii.tseglytskyi@ti.com> 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #include <common.h> 13 #include <asm/omap_common.h> 14 #include <asm/io.h> 15 16 /* 17 * Setup LDOVBB for OMAP5. 18 * On OMAP5+ some ABB settings are fused. They are handled 19 * in the following way: 20 * 21 * 1. corresponding EFUSE register contains ABB enable bit 22 * and VSET value 23 * 2. If ABB enable bit is set to 1, than ABB should be 24 * enabled, otherwise ABB should be disabled 25 * 3. If ABB is enabled, than VSET value should be copied 26 * to corresponding MUX control register 27 */ 28 s8 abb_setup_ldovbb(u32 fuse, u32 ldovbb) 29 { 30 u32 vset; 31 u32 fuse_enable_mask = OMAP5_ABB_FUSE_ENABLE_MASK; 32 u32 fuse_vset_mask = OMAP5_ABB_FUSE_VSET_MASK; 33 34 if (!is_omap54xx()) { 35 /* DRA7 */ 36 fuse_enable_mask = DRA7_ABB_FUSE_ENABLE_MASK; 37 fuse_vset_mask = DRA7_ABB_FUSE_VSET_MASK; 38 } 39 /* 40 * ABB parameters must be properly fused 41 * otherwise ABB should be disabled 42 */ 43 vset = readl(fuse); 44 if (!(vset & fuse_enable_mask)) 45 return -1; 46 47 /* prepare VSET value for LDOVBB mux register */ 48 vset &= fuse_vset_mask; 49 vset >>= ffs(fuse_vset_mask) - 1; 50 vset <<= ffs(OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK) - 1; 51 vset |= OMAP5_ABB_LDOVBBMPU_MUX_CTRL_MASK; 52 53 /* setup LDOVBB using fused value */ 54 clrsetbits_le32(ldovbb, OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK, vset); 55 56 return 0; 57 } 58