1/*
2 * Board specific setup info
3 *
4 * (C) Copyright 2010
5 * Texas Instruments, <www.ti.com>
6 *
7 * Author :
8 *	Aneesh V	<aneesh@ti.com>
9 *
10 * SPDX-License-Identifier:	GPL-2.0+
11 */
12
13#include <config.h>
14#include <asm/arch/omap.h>
15#include <asm/omap_common.h>
16#include <asm/arch/spl.h>
17#include <linux/linkage.h>
18
19.arch_extension sec
20
21#ifdef CONFIG_SPL
22ENTRY(save_boot_params)
23	ldr	r1, =OMAP_SRAM_SCRATCH_BOOT_PARAMS
24	str	r0, [r1]
25	b	save_boot_params_ret
26ENDPROC(save_boot_params)
27
28#if !defined(CONFIG_TI_SECURE_DEVICE) && defined(CONFIG_ARMV7_LPAE)
29ENTRY(switch_to_hypervisor)
30
31/*
32 * Switch to hypervisor mode
33 */
34	adr	r0, save_sp
35	str	sp, [r0]
36	adr	r1, restore_from_hyp
37	ldr	r0, =0x102
38	b	omap_smc1
39restore_from_hyp:
40	adr	r0, save_sp
41	ldr	sp, [r0]
42	MRC p15, 4, R0, c1, c0, 0
43	ldr     r1, =0X1004	@Set cache enable bits for hypervisor mode
44	orr     r0, r0, r1
45	MCR p15, 4, R0, c1, c0, 0
46	b	switch_to_hypervisor_ret
47save_sp:
48	.word	0x0
49ENDPROC(switch_to_hypervisor)
50#endif
51#endif
52
53ENTRY(omap_smc1)
54	push	{r4-r12, lr}	@ save registers - ROM code may pollute
55				@ our registers
56	mov	r12, r0		@ Service
57	mov	r0, r1		@ Argument
58
59	dsb
60	dmb
61	smc	0		@ SMC #0 to enter monitor mode
62				@ call ROM Code API for the service requested
63	pop	{r4-r12, pc}
64ENDPROC(omap_smc1)
65
66ENTRY(omap_smc_sec)
67	push	{r4-r12, lr}	@ save registers - ROM code may pollute
68				@ our registers
69	mov	r6, #0xFF	@ Indicate new Task call
70	mov	r12, #0x00	@ Secure Service ID in R12
71
72	dsb
73	dmb
74	smc	0		@ SMC #0 to enter monitor mode
75
76	b	omap_smc_sec_end @ exit at end of the service execution
77	nop
78
79	@ In case of IRQ happening in Secure, then ARM will branch here.
80	@ At that moment, IRQ will be pending and ARM will jump to Non Secure
81	@ IRQ handler
82	mov	r12, #0xFE
83
84	dsb
85	dmb
86	smc	0		@ SMC #0 to enter monitor mode
87
88omap_smc_sec_end:
89	pop	{r4-r12, pc}
90ENDPROC(omap_smc_sec)
91