1 /*
2  *
3  * Common functions for OMAP4/5 based boards
4  *
5  * (C) Copyright 2010
6  * Texas Instruments, <www.ti.com>
7  *
8  * Author :
9  *	Aneesh V	<aneesh@ti.com>
10  *	Steve Sakoman	<steve@sakoman.com>
11  *
12  * SPDX-License-Identifier:	GPL-2.0+
13  */
14 #include <common.h>
15 #include <spl.h>
16 #include <asm/arch/sys_proto.h>
17 #include <linux/sizes.h>
18 #include <asm/emif.h>
19 #include <asm/omap_common.h>
20 #include <linux/compiler.h>
21 #include <asm/system.h>
22 
23 DECLARE_GLOBAL_DATA_PTR;
24 
25 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
26 {
27 	int i;
28 	struct pad_conf_entry *pad = (struct pad_conf_entry *) array;
29 
30 	for (i = 0; i < size; i++, pad++)
31 		writew(pad->val, base + pad->offset);
32 }
33 
34 static void set_mux_conf_regs(void)
35 {
36 	switch (omap_hw_init_context()) {
37 	case OMAP_INIT_CONTEXT_SPL:
38 		set_muxconf_regs();
39 		break;
40 	case OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL:
41 		break;
42 	case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR:
43 	case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH:
44 		set_muxconf_regs();
45 		break;
46 	}
47 }
48 
49 u32 cortex_rev(void)
50 {
51 
52 	unsigned int rev;
53 
54 	/* Read Main ID Register (MIDR) */
55 	asm ("mrc p15, 0, %0, c0, c0, 0" : "=r" (rev));
56 
57 	return rev;
58 }
59 
60 static void omap_rev_string(void)
61 {
62 	u32 omap_rev = omap_revision();
63 	u32 soc_variant	= (omap_rev & 0xF0000000) >> 28;
64 	u32 omap_variant = (omap_rev & 0xFFFF0000) >> 16;
65 	u32 major_rev = (omap_rev & 0x00000F00) >> 8;
66 	u32 minor_rev = (omap_rev & 0x000000F0) >> 4;
67 
68 	const char *sec_s;
69 
70 	switch (get_device_type()) {
71 	case TST_DEVICE:
72 		sec_s = "TST";
73 		break;
74 	case EMU_DEVICE:
75 		sec_s = "EMU";
76 		break;
77 	case HS_DEVICE:
78 		sec_s = "HS";
79 		break;
80 	case GP_DEVICE:
81 		sec_s = "GP";
82 		break;
83 	default:
84 		sec_s = "?";
85 	}
86 
87 	if (soc_variant)
88 		printf("OMAP");
89 	else
90 		printf("DRA");
91 	printf("%x-%s ES%x.%x\n", omap_variant, sec_s, major_rev, minor_rev);
92 }
93 
94 #ifdef CONFIG_SPL_BUILD
95 void spl_display_print(void)
96 {
97 	omap_rev_string();
98 }
99 #endif
100 
101 void __weak srcomp_enable(void)
102 {
103 }
104 
105 /**
106  * do_board_detect() - Detect board description
107  *
108  * Function to detect board description. This is expected to be
109  * overridden in the SoC family board file where desired.
110  */
111 void __weak do_board_detect(void)
112 {
113 }
114 
115 /**
116  * vcores_init() - Assign omap_vcores based on board
117  *
118  * Function to pick the vcores based on board. This is expected to be
119  * overridden in the SoC family board file where desired.
120  */
121 void __weak vcores_init(void)
122 {
123 }
124 
125 void s_init(void)
126 {
127 }
128 
129 /**
130  * early_system_init - Does Early system initialization.
131  *
132  * Does early system init of watchdog, muxing,  andclocks
133  * Watchdog disable is done always. For the rest what gets done
134  * depends on the boot mode in which this function is executed when
135  *   1. SPL running from SRAM
136  *   2. U-Boot running from FLASH
137  *   3. U-Boot loaded to SDRAM by SPL
138  *   4. U-Boot loaded to SDRAM by ROM code using the
139  *	Configuration Header feature
140  * Please have a look at the respective functions to see what gets
141  * done in each of these cases
142  * This function is called with SRAM stack.
143  */
144 void early_system_init(void)
145 {
146 	init_omap_revision();
147 	hw_data_init();
148 
149 #ifdef CONFIG_SPL_BUILD
150 	if (warm_reset())
151 		force_emif_self_refresh();
152 #endif
153 	watchdog_init();
154 	set_mux_conf_regs();
155 #ifdef CONFIG_SPL_BUILD
156 	srcomp_enable();
157 	do_io_settings();
158 #endif
159 	setup_early_clocks();
160 	do_board_detect();
161 	vcores_init();
162 	prcm_init();
163 }
164 
165 #ifdef CONFIG_SPL_BUILD
166 void board_init_f(ulong dummy)
167 {
168 	early_system_init();
169 #ifdef CONFIG_BOARD_EARLY_INIT_F
170 	board_early_init_f();
171 #endif
172 	/* For regular u-boot sdram_init() is called from dram_init() */
173 	sdram_init();
174 }
175 #endif
176 
177 int arch_cpu_init_dm(void)
178 {
179 	early_system_init();
180 	return 0;
181 }
182 
183 /*
184  * Routine: wait_for_command_complete
185  * Description: Wait for posting to finish on watchdog
186  */
187 void wait_for_command_complete(struct watchdog *wd_base)
188 {
189 	int pending = 1;
190 	do {
191 		pending = readl(&wd_base->wwps);
192 	} while (pending);
193 }
194 
195 /*
196  * Routine: watchdog_init
197  * Description: Shut down watch dogs
198  */
199 void watchdog_init(void)
200 {
201 	struct watchdog *wd2_base = (struct watchdog *)WDT2_BASE;
202 
203 	writel(WD_UNLOCK1, &wd2_base->wspr);
204 	wait_for_command_complete(wd2_base);
205 	writel(WD_UNLOCK2, &wd2_base->wspr);
206 }
207 
208 
209 /*
210  * This function finds the SDRAM size available in the system
211  * based on DMM section configurations
212  * This is needed because the size of memory installed may be
213  * different on different versions of the board
214  */
215 u32 omap_sdram_size(void)
216 {
217 	u32 section, i, valid;
218 	u64 sdram_start = 0, sdram_end = 0, addr,
219 	    size, total_size = 0, trap_size = 0, trap_start = 0;
220 
221 	for (i = 0; i < 4; i++) {
222 		section	= __raw_readl(DMM_BASE + i*4);
223 		valid = (section & EMIF_SDRC_ADDRSPC_MASK) >>
224 			(EMIF_SDRC_ADDRSPC_SHIFT);
225 		addr = section & EMIF_SYS_ADDR_MASK;
226 
227 		/* See if the address is valid */
228 		if ((addr >= TI_ARMV7_DRAM_ADDR_SPACE_START) &&
229 		    (addr < TI_ARMV7_DRAM_ADDR_SPACE_END)) {
230 			size = ((section & EMIF_SYS_SIZE_MASK) >>
231 				   EMIF_SYS_SIZE_SHIFT);
232 			size = 1 << size;
233 			size *= SZ_16M;
234 
235 			if (valid != DMM_SDRC_ADDR_SPC_INVALID) {
236 				if (!sdram_start || (addr < sdram_start))
237 					sdram_start = addr;
238 				if (!sdram_end || ((addr + size) > sdram_end))
239 					sdram_end = addr + size;
240 			} else {
241 				trap_size = size;
242 				trap_start = addr;
243 			}
244 		}
245 	}
246 
247 	if ((trap_start >= sdram_start) && (trap_start < sdram_end))
248 		total_size = (sdram_end - sdram_start) - (trap_size);
249 	else
250 		total_size = sdram_end - sdram_start;
251 
252 	return total_size;
253 }
254 
255 
256 /*
257  * Routine: dram_init
258  * Description: sets uboots idea of sdram size
259  */
260 int dram_init(void)
261 {
262 	sdram_init();
263 	gd->ram_size = omap_sdram_size();
264 	return 0;
265 }
266 
267 /*
268  * Print board information
269  */
270 int checkboard(void)
271 {
272 	puts(sysinfo.board_string);
273 	return 0;
274 }
275 
276 /*
277  *  get_device_type(): tell if GP/HS/EMU/TST
278  */
279 u32 get_device_type(void)
280 {
281 	return (readl((*ctrl)->control_status) &
282 				      (DEVICE_TYPE_MASK)) >> DEVICE_TYPE_SHIFT;
283 }
284 
285 #if defined(CONFIG_DISPLAY_CPUINFO)
286 /*
287  * Print CPU information
288  */
289 int print_cpuinfo(void)
290 {
291 	puts("CPU  : ");
292 	omap_rev_string();
293 
294 	return 0;
295 }
296 #endif
297