1 /*
2  *
3  * Common functions for OMAP4/5 based boards
4  *
5  * (C) Copyright 2010
6  * Texas Instruments, <www.ti.com>
7  *
8  * Author :
9  *	Aneesh V	<aneesh@ti.com>
10  *	Steve Sakoman	<steve@sakoman.com>
11  *
12  * SPDX-License-Identifier:	GPL-2.0+
13  */
14 #include <common.h>
15 #include <spl.h>
16 #include <asm/arch/sys_proto.h>
17 #include <linux/sizes.h>
18 #include <asm/emif.h>
19 #include <asm/omap_common.h>
20 #include <linux/compiler.h>
21 #include <asm/system.h>
22 
23 DECLARE_GLOBAL_DATA_PTR;
24 
25 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
26 {
27 	int i;
28 	struct pad_conf_entry *pad = (struct pad_conf_entry *) array;
29 
30 	for (i = 0; i < size; i++, pad++)
31 		writew(pad->val, base + pad->offset);
32 }
33 
34 static void set_mux_conf_regs(void)
35 {
36 	switch (omap_hw_init_context()) {
37 	case OMAP_INIT_CONTEXT_SPL:
38 		set_muxconf_regs();
39 		break;
40 	case OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL:
41 		break;
42 	case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR:
43 	case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH:
44 		set_muxconf_regs();
45 		break;
46 	}
47 }
48 
49 u32 cortex_rev(void)
50 {
51 
52 	unsigned int rev;
53 
54 	/* Read Main ID Register (MIDR) */
55 	asm ("mrc p15, 0, %0, c0, c0, 0" : "=r" (rev));
56 
57 	return rev;
58 }
59 
60 static void omap_rev_string(void)
61 {
62 	u32 omap_rev = omap_revision();
63 	u32 soc_variant	= (omap_rev & 0xF0000000) >> 28;
64 	u32 omap_variant = (omap_rev & 0xFFFF0000) >> 16;
65 	u32 major_rev = (omap_rev & 0x00000F00) >> 8;
66 	u32 minor_rev = (omap_rev & 0x000000F0) >> 4;
67 
68 	const char *sec_s;
69 
70 	switch (get_device_type()) {
71 	case TST_DEVICE:
72 		sec_s = "TST";
73 		break;
74 	case EMU_DEVICE:
75 		sec_s = "EMU";
76 		break;
77 	case HS_DEVICE:
78 		sec_s = "HS";
79 		break;
80 	case GP_DEVICE:
81 		sec_s = "GP";
82 		break;
83 	default:
84 		sec_s = "?";
85 	}
86 
87 	if (soc_variant)
88 		printf("OMAP");
89 	else
90 		printf("DRA");
91 	printf("%x-%s ES%x.%x\n", omap_variant, sec_s, major_rev, minor_rev);
92 }
93 
94 #ifdef CONFIG_SPL_BUILD
95 void spl_display_print(void)
96 {
97 	omap_rev_string();
98 }
99 #endif
100 
101 void __weak srcomp_enable(void)
102 {
103 }
104 
105 /**
106  * do_board_detect() - Detect board description
107  *
108  * Function to detect board description. This is expected to be
109  * overridden in the SoC family board file where desired.
110  */
111 void __weak do_board_detect(void)
112 {
113 }
114 
115 /**
116  * vcores_init() - Assign omap_vcores based on board
117  *
118  * Function to pick the vcores based on board. This is expected to be
119  * overridden in the SoC family board file where desired.
120  */
121 void __weak vcores_init(void)
122 {
123 }
124 
125 void s_init(void)
126 {
127 }
128 
129 /**
130  * early_system_init - Does Early system initialization.
131  *
132  * Does early system init of watchdog, muxing,  andclocks
133  * Watchdog disable is done always. For the rest what gets done
134  * depends on the boot mode in which this function is executed when
135  *   1. SPL running from SRAM
136  *   2. U-Boot running from FLASH
137  *   3. U-Boot loaded to SDRAM by SPL
138  *   4. U-Boot loaded to SDRAM by ROM code using the
139  *	Configuration Header feature
140  * Please have a look at the respective functions to see what gets
141  * done in each of these cases
142  * This function is called with SRAM stack.
143  */
144 void early_system_init(void)
145 {
146 	init_omap_revision();
147 	hw_data_init();
148 
149 #ifdef CONFIG_SPL_BUILD
150 	if (warm_reset())
151 		force_emif_self_refresh();
152 #endif
153 	watchdog_init();
154 	set_mux_conf_regs();
155 #ifdef CONFIG_SPL_BUILD
156 	srcomp_enable();
157 	do_io_settings();
158 #endif
159 	setup_early_clocks();
160 	do_board_detect();
161 	vcores_init();
162 	prcm_init();
163 }
164 
165 #ifdef CONFIG_SPL_BUILD
166 void board_init_f(ulong dummy)
167 {
168 	early_system_init();
169 #ifdef CONFIG_BOARD_EARLY_INIT_F
170 	board_early_init_f();
171 #endif
172 	/* For regular u-boot sdram_init() is called from dram_init() */
173 	sdram_init();
174 	gd->ram_size = omap_sdram_size();
175 }
176 #endif
177 
178 int arch_cpu_init_dm(void)
179 {
180 	early_system_init();
181 	return 0;
182 }
183 
184 /*
185  * Routine: wait_for_command_complete
186  * Description: Wait for posting to finish on watchdog
187  */
188 void wait_for_command_complete(struct watchdog *wd_base)
189 {
190 	int pending = 1;
191 	do {
192 		pending = readl(&wd_base->wwps);
193 	} while (pending);
194 }
195 
196 /*
197  * Routine: watchdog_init
198  * Description: Shut down watch dogs
199  */
200 void watchdog_init(void)
201 {
202 	struct watchdog *wd2_base = (struct watchdog *)WDT2_BASE;
203 
204 	writel(WD_UNLOCK1, &wd2_base->wspr);
205 	wait_for_command_complete(wd2_base);
206 	writel(WD_UNLOCK2, &wd2_base->wspr);
207 }
208 
209 
210 /*
211  * This function finds the SDRAM size available in the system
212  * based on DMM section configurations
213  * This is needed because the size of memory installed may be
214  * different on different versions of the board
215  */
216 u32 omap_sdram_size(void)
217 {
218 	u32 section, i, valid;
219 	u64 sdram_start = 0, sdram_end = 0, addr,
220 	    size, total_size = 0, trap_size = 0, trap_start = 0;
221 
222 	for (i = 0; i < 4; i++) {
223 		section	= __raw_readl(DMM_BASE + i*4);
224 		valid = (section & EMIF_SDRC_ADDRSPC_MASK) >>
225 			(EMIF_SDRC_ADDRSPC_SHIFT);
226 		addr = section & EMIF_SYS_ADDR_MASK;
227 
228 		/* See if the address is valid */
229 		if ((addr >= TI_ARMV7_DRAM_ADDR_SPACE_START) &&
230 		    (addr < TI_ARMV7_DRAM_ADDR_SPACE_END)) {
231 			size = ((section & EMIF_SYS_SIZE_MASK) >>
232 				   EMIF_SYS_SIZE_SHIFT);
233 			size = 1 << size;
234 			size *= SZ_16M;
235 
236 			if (valid != DMM_SDRC_ADDR_SPC_INVALID) {
237 				if (!sdram_start || (addr < sdram_start))
238 					sdram_start = addr;
239 				if (!sdram_end || ((addr + size) > sdram_end))
240 					sdram_end = addr + size;
241 			} else {
242 				trap_size = size;
243 				trap_start = addr;
244 			}
245 		}
246 	}
247 
248 	if ((trap_start >= sdram_start) && (trap_start < sdram_end))
249 		total_size = (sdram_end - sdram_start) - (trap_size);
250 	else
251 		total_size = sdram_end - sdram_start;
252 
253 	return total_size;
254 }
255 
256 
257 /*
258  * Routine: dram_init
259  * Description: sets uboots idea of sdram size
260  */
261 int dram_init(void)
262 {
263 	sdram_init();
264 	gd->ram_size = omap_sdram_size();
265 	return 0;
266 }
267 
268 /*
269  * Print board information
270  */
271 int checkboard(void)
272 {
273 	puts(sysinfo.board_string);
274 	return 0;
275 }
276 
277 /*
278  *  get_device_type(): tell if GP/HS/EMU/TST
279  */
280 u32 get_device_type(void)
281 {
282 	return (readl((*ctrl)->control_status) &
283 				      (DEVICE_TYPE_MASK)) >> DEVICE_TYPE_SHIFT;
284 }
285 
286 #if defined(CONFIG_DISPLAY_CPUINFO)
287 /*
288  * Print CPU information
289  */
290 int print_cpuinfo(void)
291 {
292 	puts("CPU  : ");
293 	omap_rev_string();
294 
295 	return 0;
296 }
297 #endif
298