1 /*
2  * boot-common.c
3  *
4  * Common bootmode functions for omap based boards
5  *
6  * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
7  *
8  * SPDX-License-Identifier:	GPL-2.0+
9  */
10 
11 #include <common.h>
12 #include <ahci.h>
13 #include <spl.h>
14 #include <asm/omap_common.h>
15 #include <asm/arch/omap.h>
16 #include <asm/arch/mmc_host_def.h>
17 #include <asm/arch/sys_proto.h>
18 #include <watchdog.h>
19 #include <scsi.h>
20 #include <i2c.h>
21 
22 DECLARE_GLOBAL_DATA_PTR;
23 
24 __weak u32 omap_sys_boot_device(void)
25 {
26 	return BOOT_DEVICE_NONE;
27 }
28 
29 void save_omap_boot_params(void)
30 {
31 	u32 boot_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
32 	struct omap_boot_parameters *omap_boot_params;
33 	int sys_boot_device = 0;
34 	u32 boot_device;
35 	u32 boot_mode;
36 
37 	if ((boot_params < NON_SECURE_SRAM_START) ||
38 	    (boot_params > NON_SECURE_SRAM_END))
39 		return;
40 
41 	omap_boot_params = (struct omap_boot_parameters *)boot_params;
42 
43 	boot_device = omap_boot_params->boot_device;
44 	boot_mode = MMCSD_MODE_UNDEFINED;
45 
46 	/* Boot device */
47 
48 #ifdef BOOT_DEVICE_NAND_I2C
49 	/*
50 	 * Re-map NAND&I2C boot-device to the "normal" NAND boot-device.
51 	 * Otherwise the SPL boot IF can't handle this device correctly.
52 	 * Somehow booting with Hynix 4GBit NAND H27U4G8 on Siemens
53 	 * Draco leads to this boot-device passed to SPL from the BootROM.
54 	 */
55 	if (boot_device == BOOT_DEVICE_NAND_I2C)
56 		boot_device = BOOT_DEVICE_NAND;
57 #endif
58 #ifdef BOOT_DEVICE_QSPI_4
59 	/*
60 	 * We get different values for QSPI_1 and QSPI_4 being used, but
61 	 * don't actually care about this difference.  Rather than
62 	 * mangle the later code, if we're coming in as QSPI_4 just
63 	 * change to the QSPI_1 value.
64 	 */
65 	if (boot_device == BOOT_DEVICE_QSPI_4)
66 		boot_device = BOOT_DEVICE_SPI;
67 #endif
68 	/*
69 	 * When booting from peripheral booting, the boot device is not usable
70 	 * as-is (unless there is support for it), so the boot device is instead
71 	 * figured out using the SYS_BOOT pins.
72 	 */
73 	switch (boot_device) {
74 #if defined(BOOT_DEVICE_UART) && !defined(CONFIG_SPL_YMODEM_SUPPORT)
75 		case BOOT_DEVICE_UART:
76 			sys_boot_device = 1;
77 			break;
78 #endif
79 #if defined(BOOT_DEVICE_USB) && !defined(CONFIG_SPL_USB_SUPPORT)
80 		case BOOT_DEVICE_USB:
81 			sys_boot_device = 1;
82 			break;
83 #endif
84 #if defined(BOOT_DEVICE_USBETH) && !defined(CONFIG_SPL_USBETH_SUPPORT)
85 		case BOOT_DEVICE_USBETH:
86 			sys_boot_device = 1;
87 			break;
88 #endif
89 #if defined(BOOT_DEVICE_CPGMAC) && !defined(CONFIG_SPL_ETH_SUPPORT)
90 		case BOOT_DEVICE_CPGMAC:
91 			sys_boot_device = 1;
92 			break;
93 #endif
94 #if defined(BOOT_DEVICE_DFU) && !defined(CONFIG_SPL_DFU_SUPPORT)
95 		case BOOT_DEVICE_DFU:
96 			sys_boot_device = 1;
97 			break;
98 #endif
99 	}
100 
101 	if (sys_boot_device) {
102 		boot_device = omap_sys_boot_device();
103 
104 		/* MMC raw mode will fallback to FS mode. */
105 		if ((boot_device >= MMC_BOOT_DEVICES_START) &&
106 		    (boot_device <= MMC_BOOT_DEVICES_END))
107 			boot_mode = MMCSD_MODE_RAW;
108 	}
109 
110 	gd->arch.omap_boot_device = boot_device;
111 
112 	/* Boot mode */
113 
114 #ifdef CONFIG_OMAP34XX
115 	if ((boot_device >= MMC_BOOT_DEVICES_START) &&
116 	    (boot_device <= MMC_BOOT_DEVICES_END)) {
117 		switch (boot_device) {
118 		case BOOT_DEVICE_MMC1:
119 			boot_mode = MMCSD_MODE_FS;
120 			break;
121 		case BOOT_DEVICE_MMC2:
122 			boot_mode = MMCSD_MODE_RAW;
123 			break;
124 		}
125 	}
126 #else
127 	/*
128 	 * If the boot device was dynamically changed and doesn't match what
129 	 * the bootrom initially booted, we cannot use the boot device
130 	 * descriptor to figure out the boot mode.
131 	 */
132 	if ((boot_device == omap_boot_params->boot_device) &&
133 	    (boot_device >= MMC_BOOT_DEVICES_START) &&
134 	    (boot_device <= MMC_BOOT_DEVICES_END)) {
135 		boot_params = omap_boot_params->boot_device_descriptor;
136 		if ((boot_params < NON_SECURE_SRAM_START) ||
137 		    (boot_params > NON_SECURE_SRAM_END))
138 			return;
139 
140 		boot_params = *((u32 *)(boot_params + DEVICE_DATA_OFFSET));
141 		if ((boot_params < NON_SECURE_SRAM_START) ||
142 		    (boot_params > NON_SECURE_SRAM_END))
143 			return;
144 
145 		boot_mode = *((u32 *)(boot_params + BOOT_MODE_OFFSET));
146 
147 		if (boot_mode != MMCSD_MODE_FS &&
148 		    boot_mode != MMCSD_MODE_RAW)
149 #ifdef CONFIG_SUPPORT_EMMC_BOOT
150 			boot_mode = MMCSD_MODE_EMMCBOOT;
151 #else
152 			boot_mode = MMCSD_MODE_UNDEFINED;
153 #endif
154 	}
155 #endif
156 
157 	gd->arch.omap_boot_mode = boot_mode;
158 
159 #if !defined(CONFIG_TI814X) && !defined(CONFIG_TI816X) && \
160     !defined(CONFIG_AM33XX) && !defined(CONFIG_AM43XX)
161 
162 	/* CH flags */
163 
164 	gd->arch.omap_ch_flags = omap_boot_params->ch_flags;
165 #endif
166 }
167 
168 #ifdef CONFIG_SPL_BUILD
169 u32 spl_boot_device(void)
170 {
171 	return gd->arch.omap_boot_device;
172 }
173 
174 u32 spl_boot_mode(const u32 boot_device)
175 {
176 	return gd->arch.omap_boot_mode;
177 }
178 
179 void spl_board_init(void)
180 {
181 	/*
182 	 * Save the boot parameters passed from romcode.
183 	 * We cannot delay the saving further than this,
184 	 * to prevent overwrites.
185 	 */
186 	save_omap_boot_params();
187 
188 	/* Prepare console output */
189 	preloader_console_init();
190 
191 #if defined(CONFIG_SPL_NAND_SUPPORT) || defined(CONFIG_SPL_ONENAND_SUPPORT)
192 	gpmc_init();
193 #endif
194 #ifdef CONFIG_SPL_I2C_SUPPORT
195 	i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
196 #endif
197 #if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT)
198 	arch_misc_init();
199 #endif
200 #if defined(CONFIG_HW_WATCHDOG)
201 	hw_watchdog_init();
202 #endif
203 #ifdef CONFIG_AM33XX
204 	am33xx_spl_board_init();
205 #endif
206 }
207 
208 __weak int board_mmc_init(bd_t *bis)
209 {
210 	switch (spl_boot_device()) {
211 	case BOOT_DEVICE_MMC1:
212 		omap_mmc_init(0, 0, 0, -1, -1);
213 		break;
214 	case BOOT_DEVICE_MMC2:
215 	case BOOT_DEVICE_MMC2_2:
216 		omap_mmc_init(0, 0, 0, -1, -1);
217 		omap_mmc_init(1, 0, 0, -1, -1);
218 		break;
219 	}
220 	return 0;
221 }
222 
223 void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
224 {
225 	typedef void __noreturn (*image_entry_noargs_t)(u32 *);
226 	image_entry_noargs_t image_entry =
227 			(image_entry_noargs_t) spl_image->entry_point;
228 
229 	u32 boot_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
230 
231 	debug("image entry point: 0x%lX\n", spl_image->entry_point);
232 	/* Pass the saved boot_params from rom code */
233 	image_entry((u32 *)boot_params);
234 }
235 #endif
236 
237 #ifdef CONFIG_SCSI_AHCI_PLAT
238 void arch_preboot_os(void)
239 {
240 	ahci_reset((void __iomem *)DWC_AHSATA_BASE);
241 }
242 #endif
243 
244 #if defined(CONFIG_USB_FUNCTION_FASTBOOT) && !defined(CONFIG_ENV_IS_NOWHERE)
245 int fb_set_reboot_flag(void)
246 {
247 	printf("Setting reboot to fastboot flag ...\n");
248 	setenv("dofastboot", "1");
249 	saveenv();
250 	return 0;
251 }
252 #endif
253