1*983e3700STom Rini /*
2*983e3700STom Rini  * boot-common.c
3*983e3700STom Rini  *
4*983e3700STom Rini  * Common bootmode functions for omap based boards
5*983e3700STom Rini  *
6*983e3700STom Rini  * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
7*983e3700STom Rini  *
8*983e3700STom Rini  * SPDX-License-Identifier:	GPL-2.0+
9*983e3700STom Rini  */
10*983e3700STom Rini 
11*983e3700STom Rini #include <common.h>
12*983e3700STom Rini #include <ahci.h>
13*983e3700STom Rini #include <spl.h>
14*983e3700STom Rini #include <asm/omap_common.h>
15*983e3700STom Rini #include <asm/arch/omap.h>
16*983e3700STom Rini #include <asm/arch/mmc_host_def.h>
17*983e3700STom Rini #include <asm/arch/sys_proto.h>
18*983e3700STom Rini #include <watchdog.h>
19*983e3700STom Rini #include <scsi.h>
20*983e3700STom Rini #include <i2c.h>
21*983e3700STom Rini 
22*983e3700STom Rini DECLARE_GLOBAL_DATA_PTR;
23*983e3700STom Rini 
24*983e3700STom Rini __weak u32 omap_sys_boot_device(void)
25*983e3700STom Rini {
26*983e3700STom Rini 	return BOOT_DEVICE_NONE;
27*983e3700STom Rini }
28*983e3700STom Rini 
29*983e3700STom Rini void save_omap_boot_params(void)
30*983e3700STom Rini {
31*983e3700STom Rini 	u32 boot_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
32*983e3700STom Rini 	struct omap_boot_parameters *omap_boot_params;
33*983e3700STom Rini 	int sys_boot_device = 0;
34*983e3700STom Rini 	u32 boot_device;
35*983e3700STom Rini 	u32 boot_mode;
36*983e3700STom Rini 
37*983e3700STom Rini 	if ((boot_params < NON_SECURE_SRAM_START) ||
38*983e3700STom Rini 	    (boot_params > NON_SECURE_SRAM_END))
39*983e3700STom Rini 		return;
40*983e3700STom Rini 
41*983e3700STom Rini 	omap_boot_params = (struct omap_boot_parameters *)boot_params;
42*983e3700STom Rini 
43*983e3700STom Rini 	boot_device = omap_boot_params->boot_device;
44*983e3700STom Rini 	boot_mode = MMCSD_MODE_UNDEFINED;
45*983e3700STom Rini 
46*983e3700STom Rini 	/* Boot device */
47*983e3700STom Rini 
48*983e3700STom Rini #ifdef BOOT_DEVICE_NAND_I2C
49*983e3700STom Rini 	/*
50*983e3700STom Rini 	 * Re-map NAND&I2C boot-device to the "normal" NAND boot-device.
51*983e3700STom Rini 	 * Otherwise the SPL boot IF can't handle this device correctly.
52*983e3700STom Rini 	 * Somehow booting with Hynix 4GBit NAND H27U4G8 on Siemens
53*983e3700STom Rini 	 * Draco leads to this boot-device passed to SPL from the BootROM.
54*983e3700STom Rini 	 */
55*983e3700STom Rini 	if (boot_device == BOOT_DEVICE_NAND_I2C)
56*983e3700STom Rini 		boot_device = BOOT_DEVICE_NAND;
57*983e3700STom Rini #endif
58*983e3700STom Rini #ifdef BOOT_DEVICE_QSPI_4
59*983e3700STom Rini 	/*
60*983e3700STom Rini 	 * We get different values for QSPI_1 and QSPI_4 being used, but
61*983e3700STom Rini 	 * don't actually care about this difference.  Rather than
62*983e3700STom Rini 	 * mangle the later code, if we're coming in as QSPI_4 just
63*983e3700STom Rini 	 * change to the QSPI_1 value.
64*983e3700STom Rini 	 */
65*983e3700STom Rini 	if (boot_device == BOOT_DEVICE_QSPI_4)
66*983e3700STom Rini 		boot_device = BOOT_DEVICE_SPI;
67*983e3700STom Rini #endif
68*983e3700STom Rini 	/*
69*983e3700STom Rini 	 * When booting from peripheral booting, the boot device is not usable
70*983e3700STom Rini 	 * as-is (unless there is support for it), so the boot device is instead
71*983e3700STom Rini 	 * figured out using the SYS_BOOT pins.
72*983e3700STom Rini 	 */
73*983e3700STom Rini 	switch (boot_device) {
74*983e3700STom Rini #if defined(BOOT_DEVICE_UART) && !defined(CONFIG_SPL_YMODEM_SUPPORT)
75*983e3700STom Rini 		case BOOT_DEVICE_UART:
76*983e3700STom Rini 			sys_boot_device = 1;
77*983e3700STom Rini 			break;
78*983e3700STom Rini #endif
79*983e3700STom Rini #if defined(BOOT_DEVICE_USB) && !defined(CONFIG_SPL_USB_SUPPORT)
80*983e3700STom Rini 		case BOOT_DEVICE_USB:
81*983e3700STom Rini 			sys_boot_device = 1;
82*983e3700STom Rini 			break;
83*983e3700STom Rini #endif
84*983e3700STom Rini #if defined(BOOT_DEVICE_USBETH) && !defined(CONFIG_SPL_USBETH_SUPPORT)
85*983e3700STom Rini 		case BOOT_DEVICE_USBETH:
86*983e3700STom Rini 			sys_boot_device = 1;
87*983e3700STom Rini 			break;
88*983e3700STom Rini #endif
89*983e3700STom Rini #if defined(BOOT_DEVICE_CPGMAC) && !defined(CONFIG_SPL_ETH_SUPPORT)
90*983e3700STom Rini 		case BOOT_DEVICE_CPGMAC:
91*983e3700STom Rini 			sys_boot_device = 1;
92*983e3700STom Rini 			break;
93*983e3700STom Rini #endif
94*983e3700STom Rini #if defined(BOOT_DEVICE_DFU) && !defined(CONFIG_SPL_DFU_SUPPORT)
95*983e3700STom Rini 		case BOOT_DEVICE_DFU:
96*983e3700STom Rini 			sys_boot_device = 1;
97*983e3700STom Rini 			break;
98*983e3700STom Rini #endif
99*983e3700STom Rini 	}
100*983e3700STom Rini 
101*983e3700STom Rini 	if (sys_boot_device) {
102*983e3700STom Rini 		boot_device = omap_sys_boot_device();
103*983e3700STom Rini 
104*983e3700STom Rini 		/* MMC raw mode will fallback to FS mode. */
105*983e3700STom Rini 		if ((boot_device >= MMC_BOOT_DEVICES_START) &&
106*983e3700STom Rini 		    (boot_device <= MMC_BOOT_DEVICES_END))
107*983e3700STom Rini 			boot_mode = MMCSD_MODE_RAW;
108*983e3700STom Rini 	}
109*983e3700STom Rini 
110*983e3700STom Rini 	gd->arch.omap_boot_device = boot_device;
111*983e3700STom Rini 
112*983e3700STom Rini 	/* Boot mode */
113*983e3700STom Rini 
114*983e3700STom Rini #ifdef CONFIG_OMAP34XX
115*983e3700STom Rini 	if ((boot_device >= MMC_BOOT_DEVICES_START) &&
116*983e3700STom Rini 	    (boot_device <= MMC_BOOT_DEVICES_END)) {
117*983e3700STom Rini 		switch (boot_device) {
118*983e3700STom Rini 		case BOOT_DEVICE_MMC1:
119*983e3700STom Rini 			boot_mode = MMCSD_MODE_FS;
120*983e3700STom Rini 			break;
121*983e3700STom Rini 		case BOOT_DEVICE_MMC2:
122*983e3700STom Rini 			boot_mode = MMCSD_MODE_RAW;
123*983e3700STom Rini 			break;
124*983e3700STom Rini 		}
125*983e3700STom Rini 	}
126*983e3700STom Rini #else
127*983e3700STom Rini 	/*
128*983e3700STom Rini 	 * If the boot device was dynamically changed and doesn't match what
129*983e3700STom Rini 	 * the bootrom initially booted, we cannot use the boot device
130*983e3700STom Rini 	 * descriptor to figure out the boot mode.
131*983e3700STom Rini 	 */
132*983e3700STom Rini 	if ((boot_device == omap_boot_params->boot_device) &&
133*983e3700STom Rini 	    (boot_device >= MMC_BOOT_DEVICES_START) &&
134*983e3700STom Rini 	    (boot_device <= MMC_BOOT_DEVICES_END)) {
135*983e3700STom Rini 		boot_params = omap_boot_params->boot_device_descriptor;
136*983e3700STom Rini 		if ((boot_params < NON_SECURE_SRAM_START) ||
137*983e3700STom Rini 		    (boot_params > NON_SECURE_SRAM_END))
138*983e3700STom Rini 			return;
139*983e3700STom Rini 
140*983e3700STom Rini 		boot_params = *((u32 *)(boot_params + DEVICE_DATA_OFFSET));
141*983e3700STom Rini 		if ((boot_params < NON_SECURE_SRAM_START) ||
142*983e3700STom Rini 		    (boot_params > NON_SECURE_SRAM_END))
143*983e3700STom Rini 			return;
144*983e3700STom Rini 
145*983e3700STom Rini 		boot_mode = *((u32 *)(boot_params + BOOT_MODE_OFFSET));
146*983e3700STom Rini 
147*983e3700STom Rini 		if (boot_mode != MMCSD_MODE_FS &&
148*983e3700STom Rini 		    boot_mode != MMCSD_MODE_RAW)
149*983e3700STom Rini #ifdef CONFIG_SUPPORT_EMMC_BOOT
150*983e3700STom Rini 			boot_mode = MMCSD_MODE_EMMCBOOT;
151*983e3700STom Rini #else
152*983e3700STom Rini 			boot_mode = MMCSD_MODE_UNDEFINED;
153*983e3700STom Rini #endif
154*983e3700STom Rini 	}
155*983e3700STom Rini #endif
156*983e3700STom Rini 
157*983e3700STom Rini 	gd->arch.omap_boot_mode = boot_mode;
158*983e3700STom Rini 
159*983e3700STom Rini #if !defined(CONFIG_TI814X) && !defined(CONFIG_TI816X) && \
160*983e3700STom Rini     !defined(CONFIG_AM33XX) && !defined(CONFIG_AM43XX)
161*983e3700STom Rini 
162*983e3700STom Rini 	/* CH flags */
163*983e3700STom Rini 
164*983e3700STom Rini 	gd->arch.omap_ch_flags = omap_boot_params->ch_flags;
165*983e3700STom Rini #endif
166*983e3700STom Rini }
167*983e3700STom Rini 
168*983e3700STom Rini #ifdef CONFIG_SPL_BUILD
169*983e3700STom Rini u32 spl_boot_device(void)
170*983e3700STom Rini {
171*983e3700STom Rini 	return gd->arch.omap_boot_device;
172*983e3700STom Rini }
173*983e3700STom Rini 
174*983e3700STom Rini u32 spl_boot_mode(const u32 boot_device)
175*983e3700STom Rini {
176*983e3700STom Rini 	return gd->arch.omap_boot_mode;
177*983e3700STom Rini }
178*983e3700STom Rini 
179*983e3700STom Rini void spl_board_init(void)
180*983e3700STom Rini {
181*983e3700STom Rini 	/*
182*983e3700STom Rini 	 * Save the boot parameters passed from romcode.
183*983e3700STom Rini 	 * We cannot delay the saving further than this,
184*983e3700STom Rini 	 * to prevent overwrites.
185*983e3700STom Rini 	 */
186*983e3700STom Rini 	save_omap_boot_params();
187*983e3700STom Rini 
188*983e3700STom Rini 	/* Prepare console output */
189*983e3700STom Rini 	preloader_console_init();
190*983e3700STom Rini 
191*983e3700STom Rini #if defined(CONFIG_SPL_NAND_SUPPORT) || defined(CONFIG_SPL_ONENAND_SUPPORT)
192*983e3700STom Rini 	gpmc_init();
193*983e3700STom Rini #endif
194*983e3700STom Rini #ifdef CONFIG_SPL_I2C_SUPPORT
195*983e3700STom Rini 	i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
196*983e3700STom Rini #endif
197*983e3700STom Rini #if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT)
198*983e3700STom Rini 	arch_misc_init();
199*983e3700STom Rini #endif
200*983e3700STom Rini #if defined(CONFIG_HW_WATCHDOG)
201*983e3700STom Rini 	hw_watchdog_init();
202*983e3700STom Rini #endif
203*983e3700STom Rini #ifdef CONFIG_AM33XX
204*983e3700STom Rini 	am33xx_spl_board_init();
205*983e3700STom Rini #endif
206*983e3700STom Rini }
207*983e3700STom Rini 
208*983e3700STom Rini __weak int board_mmc_init(bd_t *bis)
209*983e3700STom Rini {
210*983e3700STom Rini 	switch (spl_boot_device()) {
211*983e3700STom Rini 	case BOOT_DEVICE_MMC1:
212*983e3700STom Rini 		omap_mmc_init(0, 0, 0, -1, -1);
213*983e3700STom Rini 		break;
214*983e3700STom Rini 	case BOOT_DEVICE_MMC2:
215*983e3700STom Rini 	case BOOT_DEVICE_MMC2_2:
216*983e3700STom Rini 		omap_mmc_init(0, 0, 0, -1, -1);
217*983e3700STom Rini 		omap_mmc_init(1, 0, 0, -1, -1);
218*983e3700STom Rini 		break;
219*983e3700STom Rini 	}
220*983e3700STom Rini 	return 0;
221*983e3700STom Rini }
222*983e3700STom Rini 
223*983e3700STom Rini void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
224*983e3700STom Rini {
225*983e3700STom Rini 	typedef void __noreturn (*image_entry_noargs_t)(u32 *);
226*983e3700STom Rini 	image_entry_noargs_t image_entry =
227*983e3700STom Rini 			(image_entry_noargs_t) spl_image->entry_point;
228*983e3700STom Rini 
229*983e3700STom Rini 	u32 boot_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
230*983e3700STom Rini 
231*983e3700STom Rini 	debug("image entry point: 0x%X\n", spl_image->entry_point);
232*983e3700STom Rini 	/* Pass the saved boot_params from rom code */
233*983e3700STom Rini 	image_entry((u32 *)boot_params);
234*983e3700STom Rini }
235*983e3700STom Rini #endif
236*983e3700STom Rini 
237*983e3700STom Rini #ifdef CONFIG_SCSI_AHCI_PLAT
238*983e3700STom Rini void arch_preboot_os(void)
239*983e3700STom Rini {
240*983e3700STom Rini 	ahci_reset((void __iomem *)DWC_AHSATA_BASE);
241*983e3700STom Rini }
242*983e3700STom Rini #endif
243*983e3700STom Rini 
244*983e3700STom Rini #if defined(CONFIG_USB_FUNCTION_FASTBOOT) && !defined(CONFIG_ENV_IS_NOWHERE)
245*983e3700STom Rini int fb_set_reboot_flag(void)
246*983e3700STom Rini {
247*983e3700STom Rini 	printf("Setting reboot to fastboot flag ...\n");
248*983e3700STom Rini 	setenv("dofastboot", "1");
249*983e3700STom Rini 	saveenv();
250*983e3700STom Rini 	return 0;
251*983e3700STom Rini }
252*983e3700STom Rini #endif
253