1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (C) 2016 Marvell International Ltd.
4 */
5
6#include <asm/arch-armada8k/cache_llc.h>
7#include <linux/linkage.h>
8
9/*
10 * int __asm_flush_l3_dcache
11 *
12 * flush Armada-8K last level cache.
13 *
14 */
15ENTRY(__asm_flush_l3_dcache)
16	/* flush cache */
17	mov     x0, #LLC_BASE_ADDR
18	add	x0, x0, #LLC_FLUSH_BY_WAY
19	movk    x0, #MVEBU_A8K_REGS_BASE_MSB, lsl #16
20	mov     w1, #LLC_WAY_MASK
21	str     w1, [x0]
22	/* sync cache */
23	mov     x0, #LLC_BASE_ADDR
24	add	x0, x0, #LLC_CACHE_SYNC
25	movk    x0, #MVEBU_A8K_REGS_BASE_MSB, lsl #16
26	str     wzr, [x0]
27	/* check that cache sync completed */
28	mov     x0, #LLC_BASE_ADDR
29	add	x0, x0, #LLC_CACHE_SYNC_COMPLETE
30	movk    x0, #MVEBU_A8K_REGS_BASE_MSB, lsl #16
311:	ldr	w1, [x0]
32	and	w1, w1, #LLC_CACHE_SYNC_MASK
33	cbnz	w1, 1b
34	/* return success */
35	mov	x0, #0
36	ret
37ENDPROC(__asm_flush_l3_dcache)
38