1/*
2 * Copyright (C) 2016 Marvell International Ltd.
3 *
4 * SPDX-License-Identifier:	GPL-2.0
5 * https://spdx.org/licenses
6 */
7
8#include <asm/arch-armada8k/cache_llc.h>
9#include <linux/linkage.h>
10
11/*
12 * int __asm_flush_l3_dcache
13 *
14 * flush Armada-8K last level cache.
15 *
16 */
17ENTRY(__asm_flush_l3_dcache)
18	/* flush cache */
19	mov     x0, #LLC_BASE_ADDR
20	add	x0, x0, #LLC_FLUSH_BY_WAY
21	movk    x0, #MVEBU_A8K_REGS_BASE_MSB, lsl #16
22	mov     w1, #LLC_WAY_MASK
23	str     w1, [x0]
24	/* sync cache */
25	mov     x0, #LLC_BASE_ADDR
26	add	x0, x0, #LLC_CACHE_SYNC
27	movk    x0, #MVEBU_A8K_REGS_BASE_MSB, lsl #16
28	str     wzr, [x0]
29	/* check that cache sync completed */
30	mov     x0, #LLC_BASE_ADDR
31	add	x0, x0, #LLC_CACHE_SYNC_COMPLETE
32	movk    x0, #MVEBU_A8K_REGS_BASE_MSB, lsl #16
331:	ldr	w1, [x0]
34	and	w1, w1, #LLC_CACHE_SYNC_MASK
35	cbnz	w1, 1b
36	/* return success */
37	mov	x0, #0
38	ret
39ENDPROC(__asm_flush_l3_dcache)
40