1 /* 2 * (C) Copyright 2009 3 * Marvell Semiconductor <www.marvell.com> 4 * Written-by: Prafulla Wadaskar <prafulla@marvell.com> 5 * 6 * Header file for the Marvell's Feroceon CPU core. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef _ASM_ARCH_KIRKWOOD_H 12 #define _ASM_ARCH_KIRKWOOD_H 13 14 #if defined (CONFIG_FEROCEON_88FR131) || defined (CONFIG_SHEEVA_88SV131) 15 16 /* SOC specific definations */ 17 #define INTREG_BASE 0xd0000000 18 #define KW_REGISTER(x) (KW_REGS_PHY_BASE + x) 19 #define KW_OFFSET_REG (INTREG_BASE + 0x20080) 20 21 /* undocumented registers */ 22 #define KW_REG_UNDOC_0x1470 (KW_REGISTER(0x1470)) 23 #define KW_REG_UNDOC_0x1478 (KW_REGISTER(0x1478)) 24 25 #define MVEBU_SDRAM_BASE (KW_REGISTER(0x1500)) 26 #define KW_TWSI_BASE (KW_REGISTER(0x11000)) 27 #define KW_UART0_BASE (KW_REGISTER(0x12000)) 28 #define KW_UART1_BASE (KW_REGISTER(0x12100)) 29 #define KW_MPP_BASE (KW_REGISTER(0x10000)) 30 #define MVEBU_GPIO0_BASE (KW_REGISTER(0x10100)) 31 #define MVEBU_GPIO1_BASE (KW_REGISTER(0x10140)) 32 #define KW_RTC_BASE (KW_REGISTER(0x10300)) 33 #define KW_NANDF_BASE (KW_REGISTER(0x10418)) 34 #define MVEBU_SPI_BASE (KW_REGISTER(0x10600)) 35 #define KW_CPU_WIN_BASE (KW_REGISTER(0x20000)) 36 #define KW_CPU_REG_BASE (KW_REGISTER(0x20100)) 37 #define MVEBU_TIMER_BASE (KW_REGISTER(0x20300)) 38 #define KW_REG_PCIE_BASE (KW_REGISTER(0x40000)) 39 #define KW_USB20_BASE (KW_REGISTER(0x50000)) 40 #define KW_EGIGA0_BASE (KW_REGISTER(0x72000)) 41 #define KW_EGIGA1_BASE (KW_REGISTER(0x76000)) 42 #define KW_SATA_BASE (KW_REGISTER(0x80000)) 43 #define KW_SDIO_BASE (KW_REGISTER(0x90000)) 44 45 /* Kirkwood Sata controller has two ports */ 46 #define KW_SATA_PORT0_OFFSET 0x2000 47 #define KW_SATA_PORT1_OFFSET 0x4000 48 49 /* Kirkwood GbE controller has two ports */ 50 #define MAX_MVGBE_DEVS 2 51 #define MVGBE0_BASE KW_EGIGA0_BASE 52 #define MVGBE1_BASE KW_EGIGA1_BASE 53 54 /* Kirkwood USB Host controller */ 55 #define MVUSB0_BASE KW_USB20_BASE 56 #define MVUSB0_CPU_ATTR_DRAM_CS0 KWCPU_ATTR_DRAM_CS0 57 #define MVUSB0_CPU_ATTR_DRAM_CS1 KWCPU_ATTR_DRAM_CS1 58 #define MVUSB0_CPU_ATTR_DRAM_CS2 KWCPU_ATTR_DRAM_CS2 59 #define MVUSB0_CPU_ATTR_DRAM_CS3 KWCPU_ATTR_DRAM_CS3 60 61 /* Kirkwood CPU memory windows */ 62 #define MVCPU_WIN_CTRL_DATA KWCPU_WIN_CTRL_DATA 63 #define MVCPU_WIN_ENABLE KWCPU_WIN_ENABLE 64 #define MVCPU_WIN_DISABLE KWCPU_WIN_DISABLE 65 66 #if defined (CONFIG_KW88F6281) 67 #include <asm/arch/kw88f6281.h> 68 #elif defined (CONFIG_KW88F6192) 69 #include <asm/arch/kw88f6192.h> 70 #else 71 #error "SOC Name not defined" 72 #endif /* CONFIG_KW88F6281 */ 73 #endif /* CONFIG_FEROCEON_88FR131 */ 74 #endif /* _ASM_ARCH_KIRKWOOD_H */ 75