1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * K2G: Pinmux configuration
4  *
5  * (C) Copyright 2015
6  *     Texas Instruments Incorporated, <www.ti.com>
7  */
8 
9 #ifndef __ASM_ARCH_MUX_K2G_H
10 #define __ASM_ARCH_MUX_K2G_H
11 
12 #include <common.h>
13 #include <asm/io.h>
14 
15 #define K2G_PADCFG_REG	(KS2_DEVICE_STATE_CTRL_BASE + 0x1000)
16 
17 /*
18  * 20:19 - buffer class RW fixed
19  * 18    - rxactive (Input enabled for the pad ) 0 - Di; 1 - En;
20  * 17    - pulltypesel (0 - PULLDOWN; 1 - PULLUP);
21  * 16    - pulluden (0 - PULLUP/DOWN EN; 1 - DI);
22  * 3:0   - muxmode (available modes 0:5)
23  */
24 
25 #define PIN_IEN	(1 << 18) /* pin input enabled */
26 #define PIN_PDIS	(1 << 16) /* pull up/down disabled */
27 #define PIN_PTU	(1 << 17) /* pull up */
28 #define PIN_PTD	(0 << 17) /* pull down */
29 
30 #define MODE(m)	((m) & 0x7)
31 #define MAX_PIN_N	260
32 
33 #define MUX_CFG(value, index)  \
34 	__raw_writel(\
35 		     (value) | \
36 		     (__raw_readl(K2G_PADCFG_REG + (index << 2)) & \
37 		      (0x3 << 19)),\
38 		     (K2G_PADCFG_REG + (index << 2))\
39 		    );
40 
41 struct pin_cfg {
42 	int	reg_inx;
43 	u32	val;
44 };
45 
46 static inline void configure_pin_mux(struct pin_cfg *pin_mux)
47 {
48 	if (!pin_mux)
49 		return;
50 
51 	while ((pin_mux->reg_inx >= 0) && (pin_mux->reg_inx < MAX_PIN_N)) {
52 		MUX_CFG(pin_mux->val, pin_mux->reg_inx);
53 		pin_mux++;
54 	}
55 }
56 
57 #endif /* __ASM_ARCH_MUX_K2G_H */
58