1 /*
2  * keystone2: common clock header file
3  *
4  * (C) Copyright 2012-2014
5  *     Texas Instruments Incorporated, <www.ti.com>
6  *
7  * SPDX-License-Identifier:     GPL-2.0+
8  */
9 
10 #ifndef __ASM_ARCH_CLOCK_H
11 #define __ASM_ARCH_CLOCK_H
12 
13 #ifndef __ASSEMBLY__
14 
15 #ifdef CONFIG_SOC_K2HK
16 #include <asm/arch/clock-k2hk.h>
17 #endif
18 
19 #ifdef CONFIG_SOC_K2E
20 #include <asm/arch/clock-k2e.h>
21 #endif
22 
23 #ifdef CONFIG_SOC_K2L
24 #include <asm/arch/clock-k2l.h>
25 #endif
26 
27 #define MAIN_PLL CORE_PLL
28 
29 #include <asm/types.h>
30 
31 #define GENERATE_ENUM(NUM, ENUM) ENUM = NUM,
32 #define GENERATE_INDX_STR(NUM, STRING) #NUM"\t- "#STRING"\n"
33 #define CLOCK_INDEXES_LIST	CLK_LIST(GENERATE_INDX_STR)
34 
35 enum clk_e {
36 	CLK_LIST(GENERATE_ENUM)
37 };
38 
39 struct keystone_pll_regs {
40 	u32 reg0;
41 	u32 reg1;
42 };
43 
44 /* PLL configuration data */
45 struct pll_init_data {
46 	int pll;
47 	int pll_m;		/* PLL Multiplier */
48 	int pll_d;		/* PLL divider */
49 	int pll_od;		/* PLL output divider */
50 };
51 
52 extern const struct keystone_pll_regs keystone_pll_regs[];
53 extern int dev_speeds[];
54 extern int arm_speeds[];
55 
56 void init_plls(int num_pll, struct pll_init_data *config);
57 void init_pll(const struct pll_init_data *data);
58 unsigned long clk_get_rate(unsigned int clk);
59 unsigned long clk_round_rate(unsigned int clk, unsigned long hz);
60 int clk_set_rate(unsigned int clk, unsigned long hz);
61 void pass_pll_pa_clk_enable(void);
62 int get_max_dev_speed(void);
63 int get_max_arm_speed(void);
64 
65 #endif
66 #endif
67