1 /*
2  * keystone2: commands for clocks
3  *
4  * (C) Copyright 2012-2014
5  *     Texas Instruments Incorporated, <www.ti.com>
6  *
7  * SPDX-License-Identifier:     GPL-2.0+
8  */
9 
10 #include <common.h>
11 #include <command.h>
12 #include <asm/arch/hardware.h>
13 #include <asm/arch/clock.h>
14 #include <asm/arch/psc_defs.h>
15 
16 struct pll_init_data cmd_pll_data = {
17 	.pll = MAIN_PLL,
18 	.pll_m = 16,
19 	.pll_d = 1,
20 	.pll_od = 2,
21 };
22 
23 int do_pll_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
24 {
25 	if (argc != 5)
26 		goto pll_cmd_usage;
27 
28 	if (strncmp(argv[1], "pa", 2) == 0)
29 		cmd_pll_data.pll = PASS_PLL;
30 #ifndef CONFIG_SOC_K2E
31 	else if (strncmp(argv[1], "arm", 3) == 0)
32 		cmd_pll_data.pll = TETRIS_PLL;
33 #endif
34 #ifdef CONFIG_SOC_K2HK
35 	else if (strncmp(argv[1], "ddr3a", 5) == 0)
36 		cmd_pll_data.pll = DDR3A_PLL;
37 	else if (strncmp(argv[1], "ddr3b", 5) == 0)
38 		cmd_pll_data.pll = DDR3B_PLL;
39 #else
40 	else if (strncmp(argv[1], "ddr3", 4) == 0)
41 		cmd_pll_data.pll = DDR3_PLL;
42 #endif
43 	else
44 		goto pll_cmd_usage;
45 
46 	cmd_pll_data.pll_m   = simple_strtoul(argv[2], NULL, 10);
47 	cmd_pll_data.pll_d   = simple_strtoul(argv[3], NULL, 10);
48 	cmd_pll_data.pll_od  = simple_strtoul(argv[4], NULL, 10);
49 
50 	printf("Trying to set pll %d; mult %d; div %d; OD %d\n",
51 	       cmd_pll_data.pll, cmd_pll_data.pll_m,
52 	       cmd_pll_data.pll_d, cmd_pll_data.pll_od);
53 	init_pll(&cmd_pll_data);
54 
55 	return 0;
56 
57 pll_cmd_usage:
58 	return cmd_usage(cmdtp);
59 }
60 
61 U_BOOT_CMD(
62 	pllset, 5,      0,      do_pll_cmd,
63 	"set pll multiplier and pre divider",
64 	PLLSET_CMD_LIST " <mult> <div> <OD>\n"
65 );
66 
67 int do_getclk_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
68 {
69 	unsigned int clk;
70 	unsigned long freq;
71 
72 	if (argc != 2)
73 		goto getclk_cmd_usage;
74 
75 	clk = simple_strtoul(argv[1], NULL, 10);
76 
77 	freq = ks_clk_get_rate(clk);
78 	if (freq)
79 		printf("clock index [%d] - frequency %lu\n", clk, freq);
80 	else
81 		printf("clock index [%d] Not available\n", clk);
82 	return 0;
83 
84 getclk_cmd_usage:
85 	return cmd_usage(cmdtp);
86 }
87 
88 U_BOOT_CMD(
89 	getclk,	2,	0,	do_getclk_cmd,
90 	"get clock rate",
91 	"<clk index>\n"
92 	"The indexes for clocks:\n"
93 	CLOCK_INDEXES_LIST
94 );
95 
96 int do_psc_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
97 {
98 	int	psc_module;
99 	int	res;
100 
101 	if (argc != 3)
102 		goto psc_cmd_usage;
103 
104 	psc_module = simple_strtoul(argv[1], NULL, 10);
105 	if (strcmp(argv[2], "en") == 0) {
106 		res = psc_enable_module(psc_module);
107 		printf("psc_enable_module(%d) - %s\n", psc_module,
108 		       (res) ? "ERROR" : "OK");
109 		return 0;
110 	}
111 
112 	if (strcmp(argv[2], "di") == 0) {
113 		res = psc_disable_module(psc_module);
114 		printf("psc_disable_module(%d) - %s\n", psc_module,
115 		       (res) ? "ERROR" : "OK");
116 		return 0;
117 	}
118 
119 	if (strcmp(argv[2], "domain") == 0) {
120 		res = psc_disable_domain(psc_module);
121 		printf("psc_disable_domain(%d) - %s\n", psc_module,
122 		       (res) ? "ERROR" : "OK");
123 		return 0;
124 	}
125 
126 psc_cmd_usage:
127 	return cmd_usage(cmdtp);
128 }
129 
130 U_BOOT_CMD(
131 	psc,	3,	0,	do_psc_cmd,
132 	"<enable/disable psc module os disable domain>",
133 	"<mod/domain index> <en|di|domain>\n"
134 	"Intended to control Power and Sleep Controller (PSC) domains and\n"
135 	"modules. The module or domain index exectly corresponds to ones\n"
136 	"listed in official TRM. For instance, to enable MSMC RAM clock\n"
137 	"domain use command: psc 14 en.\n"
138 );
139