xref: /openbmc/u-boot/arch/arm/mach-k3/Kconfig (revision dd1033e4)
1if ARCH_K3
2
3choice
4	prompt "Texas Instruments' K3 based SoC select"
5	optional
6
7config SOC_K3_AM6
8	bool "TI's K3 based AM6 SoC Family Support"
9
10endchoice
11
12config SYS_SOC
13	default "k3"
14
15config SYS_K3_NON_SECURE_MSRAM_SIZE
16	hex
17	default 0x80000
18	help
19	  Describes the total size of the MCU MSRAM. This doesn't
20	  specify the total size of SPL as ROM can use some part
21	  of this RAM. Once ROM gives control to SPL then this
22	  complete size can be usable.
23
24config SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE
25	hex
26	default 0x58000
27	help
28	  Describes the maximum size of the image that ROM can download
29	  from any boot media.
30
31config SYS_K3_MCU_SCRATCHPAD_BASE
32	hex
33	default 0x40280000 if SOC_K3_AM6
34	help
35	  Describes the base address of MCU Scratchpad RAM.
36
37config SYS_K3_MCU_SCRATCHPAD_SIZE
38	hex
39	default 0x200 if SOC_K3_AM6
40	help
41	  Describes the size of MCU Scratchpad RAM.
42
43config SYS_K3_BOOT_PARAM_TABLE_INDEX
44	hex
45	default 0x41c7fbfc if SOC_K3_AM6
46	help
47	  Address at which ROM stores the value which determines if SPL
48	  is booted up by primary boot media or secondary boot media.
49
50config SYS_K3_KEY
51	string "Key used to generate x509 certificate"
52	help
53	  This option enables to provide a custom key that can be used for
54	  generating x509 certificate for spl binary. If not needed leave
55	  it blank so that a random key is generated and used.
56
57config SYS_K3_BOOT_CORE_ID
58	int
59	default 16
60
61config SYS_K3_SPL_ATF
62	bool "Start Cortex-A from SPL"
63	depends on SPL && CPU_V7R
64	help
65	  Enabling this will try to start Cortex-A (typically with ATF)
66	  after SPL from R5.
67
68source "board/ti/am65x/Kconfig"
69endif
70