xref: /openbmc/u-boot/arch/arm/mach-imx/syscounter.c (revision 15809705)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2015 Freescale Semiconductor, Inc.
4  *
5  * The file use ls102xa/timer.c as a reference.
6  */
7 
8 #include <common.h>
9 #include <asm/io.h>
10 #include <div64.h>
11 #include <asm/arch/imx-regs.h>
12 #include <asm/arch/sys_proto.h>
13 #include <asm/mach-imx/syscounter.h>
14 
15 DECLARE_GLOBAL_DATA_PTR;
16 
17 /*
18  * This function is intended for SHORT delays only.
19  * It will overflow at around 10 seconds @ 400MHz,
20  * or 20 seconds @ 200MHz.
21  */
22 unsigned long usec2ticks(unsigned long usec)
23 {
24 	ulong ticks;
25 
26 	if (usec < 1000)
27 		ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000;
28 	else
29 		ticks = ((usec / 10) * (get_tbclk() / 100000));
30 
31 	return ticks;
32 }
33 
34 static inline unsigned long long tick_to_time(unsigned long long tick)
35 {
36 	unsigned long freq;
37 
38 	asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
39 
40 	tick *= CONFIG_SYS_HZ;
41 	do_div(tick, freq);
42 
43 	return tick;
44 }
45 
46 static inline unsigned long long us_to_tick(unsigned long long usec)
47 {
48 	unsigned long freq;
49 
50 	asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
51 
52 	usec = usec * freq  + 999999;
53 	do_div(usec, 1000000);
54 
55 	return usec;
56 }
57 
58 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
59 int timer_init(void)
60 {
61 	struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR;
62 	unsigned long val, freq;
63 
64 	freq = CONFIG_SC_TIMER_CLK;
65 	asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
66 
67 	writel(freq, &sctr->cntfid0);
68 
69 	/* Enable system counter */
70 	val = readl(&sctr->cntcr);
71 	val &= ~(SC_CNTCR_FREQ0 | SC_CNTCR_FREQ1);
72 	val |= SC_CNTCR_FREQ0 | SC_CNTCR_ENABLE | SC_CNTCR_HDBG;
73 	writel(val, &sctr->cntcr);
74 
75 	gd->arch.tbl = 0;
76 	gd->arch.tbu = 0;
77 
78 	return 0;
79 }
80 #endif
81 
82 unsigned long long get_ticks(void)
83 {
84 	unsigned long long now;
85 
86 	asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (now));
87 
88 	gd->arch.tbl = (unsigned long)(now & 0xffffffff);
89 	gd->arch.tbu = (unsigned long)(now >> 32);
90 
91 	return now;
92 }
93 
94 ulong get_timer(ulong base)
95 {
96 	return tick_to_time(get_ticks()) - base;
97 }
98 
99 void __udelay(unsigned long usec)
100 {
101 	unsigned long long tmp;
102 	ulong tmo;
103 
104 	tmo = us_to_tick(usec);
105 	tmp = get_ticks() + tmo;	/* get current timestamp */
106 
107 	while (get_ticks() < tmp)	/* loop till event */
108 		 /*NOP*/;
109 }
110 
111 /*
112  * This function is derived from PowerPC code (timebase clock frequency).
113  * On ARM it returns the number of timer ticks per second.
114  */
115 ulong get_tbclk(void)
116 {
117 	unsigned long freq;
118 
119 	asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
120 
121 	return freq;
122 }
123