1 /* 2 * Copyright (C) 2014 Gateworks Corporation 3 * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. 4 * 5 * Author: Tim Harvey <tharvey@gateworks.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #include <common.h> 11 #include <asm/io.h> 12 #include <asm/arch/imx-regs.h> 13 #include <asm/arch/sys_proto.h> 14 #include <asm/spl.h> 15 #include <spl.h> 16 #include <asm/mach-imx/hab.h> 17 #include <asm/mach-imx/boot_mode.h> 18 #include <g_dnl.h> 19 20 DECLARE_GLOBAL_DATA_PTR; 21 22 #if defined(CONFIG_MX6) 23 /* determine boot device from SRC_SBMR1 (BOOT_CFG[4:1]) or SRC_GPR9 register */ 24 u32 spl_boot_device(void) 25 { 26 unsigned int bmode = readl(&src_base->sbmr2); 27 u32 reg = imx6_src_get_boot_mode(); 28 29 /* 30 * Check for BMODE if serial downloader is enabled 31 * BOOT_MODE - see IMX6DQRM Table 8-1 32 */ 33 if (((bmode >> 24) & 0x03) == 0x01) /* Serial Downloader */ 34 return BOOT_DEVICE_BOARD; 35 36 /* 37 * The above method does not detect that the boot ROM used 38 * serial downloader in case the boot ROM decided to use the 39 * serial downloader as a fall back (primary boot source failed). 40 * 41 * Infer that the boot ROM used the USB serial downloader by 42 * checking whether the USB PHY is currently active... This 43 * assumes that SPL did not (yet) initialize the USB PHY... 44 */ 45 if (is_usbotg_phy_active()) 46 return BOOT_DEVICE_BOARD; 47 48 /* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */ 49 switch ((reg & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) { 50 /* EIM: See 8.5.1, Table 8-9 */ 51 case IMX6_BMODE_EMI: 52 /* BOOT_CFG1[3]: NOR/OneNAND Selection */ 53 switch ((reg & IMX6_BMODE_EMI_MASK) >> IMX6_BMODE_EMI_SHIFT) { 54 case IMX6_BMODE_ONENAND: 55 return BOOT_DEVICE_ONENAND; 56 case IMX6_BMODE_NOR: 57 return BOOT_DEVICE_NOR; 58 break; 59 } 60 /* Reserved: Used to force Serial Downloader */ 61 case IMX6_BMODE_RESERVED: 62 return BOOT_DEVICE_BOARD; 63 /* SATA: See 8.5.4, Table 8-20 */ 64 #if !defined(CONFIG_MX6UL) && !defined(CONFIG_MX6ULL) 65 case IMX6_BMODE_SATA: 66 return BOOT_DEVICE_SATA; 67 #endif 68 /* Serial ROM: See 8.5.5.1, Table 8-22 */ 69 case IMX6_BMODE_SERIAL_ROM: 70 /* BOOT_CFG4[2:0] */ 71 switch ((reg & IMX6_BMODE_SERIAL_ROM_MASK) >> 72 IMX6_BMODE_SERIAL_ROM_SHIFT) { 73 case IMX6_BMODE_ECSPI1: 74 case IMX6_BMODE_ECSPI2: 75 case IMX6_BMODE_ECSPI3: 76 case IMX6_BMODE_ECSPI4: 77 case IMX6_BMODE_ECSPI5: 78 return BOOT_DEVICE_SPI; 79 case IMX6_BMODE_I2C1: 80 case IMX6_BMODE_I2C2: 81 case IMX6_BMODE_I2C3: 82 return BOOT_DEVICE_I2C; 83 } 84 break; 85 /* SD/eSD: 8.5.3, Table 8-15 */ 86 case IMX6_BMODE_SD: 87 case IMX6_BMODE_ESD: 88 return BOOT_DEVICE_MMC1; 89 /* MMC/eMMC: 8.5.3 */ 90 case IMX6_BMODE_MMC: 91 case IMX6_BMODE_EMMC: 92 return BOOT_DEVICE_MMC1; 93 /* NAND Flash: 8.5.2, Table 8-10 */ 94 case IMX6_BMODE_NAND_MIN ... IMX6_BMODE_NAND_MAX: 95 return BOOT_DEVICE_NAND; 96 } 97 return BOOT_DEVICE_NONE; 98 } 99 100 #elif defined(CONFIG_MX7) || defined(CONFIG_MX8M) 101 /* Translate iMX7/MX8M boot device to the SPL boot device enumeration */ 102 u32 spl_boot_device(void) 103 { 104 enum boot_device boot_device_spl = get_boot_device(); 105 106 switch (boot_device_spl) { 107 case SD1_BOOT: 108 case MMC1_BOOT: 109 case SD2_BOOT: 110 case MMC2_BOOT: 111 case SD3_BOOT: 112 case MMC3_BOOT: 113 return BOOT_DEVICE_MMC1; 114 case NAND_BOOT: 115 return BOOT_DEVICE_NAND; 116 case SPI_NOR_BOOT: 117 return BOOT_DEVICE_SPI; 118 case USB_BOOT: 119 return BOOT_DEVICE_USB; 120 default: 121 return BOOT_DEVICE_NONE; 122 } 123 } 124 #endif /* CONFIG_MX6 || CONFIG_MX7 || CONFIG_MX8M */ 125 126 #ifdef CONFIG_SPL_USB_GADGET_SUPPORT 127 int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name) 128 { 129 put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM + 0xfff, &dev->idProduct); 130 131 return 0; 132 } 133 #endif 134 135 #if defined(CONFIG_SPL_MMC_SUPPORT) 136 /* called from spl_mmc to see type of boot mode for storage (RAW or FAT) */ 137 u32 spl_boot_mode(const u32 boot_device) 138 { 139 switch (spl_boot_device()) { 140 /* for MMC return either RAW or FAT mode */ 141 case BOOT_DEVICE_MMC1: 142 case BOOT_DEVICE_MMC2: 143 #if defined(CONFIG_SPL_FAT_SUPPORT) 144 return MMCSD_MODE_FS; 145 #elif defined(CONFIG_SUPPORT_EMMC_BOOT) 146 return MMCSD_MODE_EMMCBOOT; 147 #else 148 return MMCSD_MODE_RAW; 149 #endif 150 break; 151 default: 152 puts("spl: ERROR: unsupported device\n"); 153 hang(); 154 } 155 } 156 #endif 157 158 #if defined(CONFIG_SECURE_BOOT) 159 160 /* 161 * +------------+ 0x0 (DDR_UIMAGE_START) - 162 * | Header | | 163 * +------------+ 0x40 | 164 * | | | 165 * | | | 166 * | | | 167 * | | | 168 * | Image Data | | 169 * . | | 170 * . | > Stuff to be authenticated ----+ 171 * . | | | 172 * | | | | 173 * | | | | 174 * +------------+ | | 175 * | | | | 176 * | Fill Data | | | 177 * | | | | 178 * +------------+ Align to ALIGN_SIZE | | 179 * | IVT | | | 180 * +------------+ + IVT_SIZE - | 181 * | | | 182 * | CSF DATA | <---------------------------------------------------------+ 183 * | | 184 * +------------+ 185 * | | 186 * | Fill Data | 187 * | | 188 * +------------+ + CSF_PAD_SIZE 189 */ 190 191 __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) 192 { 193 typedef void __noreturn (*image_entry_noargs_t)(void); 194 uint32_t offset; 195 196 image_entry_noargs_t image_entry = 197 (image_entry_noargs_t)(unsigned long)spl_image->entry_point; 198 199 debug("image entry point: 0x%lX\n", spl_image->entry_point); 200 201 /* HAB looks for the CSF at the end of the authenticated data therefore, 202 * we need to subtract the size of the CSF from the actual filesize */ 203 offset = spl_image->size - CONFIG_CSF_SIZE; 204 if (!imx_hab_authenticate_image(spl_image->load_addr, 205 offset + IVT_SIZE + CSF_PAD_SIZE, 206 offset)) { 207 image_entry(); 208 } else { 209 puts("spl: ERROR: image authentication unsuccessful\n"); 210 hang(); 211 } 212 } 213 214 #endif 215 216 #if defined(CONFIG_MX6) && defined(CONFIG_SPL_OS_BOOT) 217 int dram_init_banksize(void) 218 { 219 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 220 gd->bd->bi_dram[0].size = imx_ddr_size(); 221 222 return 0; 223 } 224 #endif 225