xref: /openbmc/u-boot/arch/arm/mach-imx/speed.c (revision dd1033e4)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2000-2003
4  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5  *
6  * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
7  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
8  */
9 
10 #include <common.h>
11 #include <asm/arch/imx-regs.h>
12 #include <asm/arch/clock.h>
13 
14 #ifdef CONFIG_FSL_ESDHC
15 DECLARE_GLOBAL_DATA_PTR;
16 #endif
17 
18 int get_clocks(void)
19 {
20 #ifdef CONFIG_FSL_ESDHC
21 #ifdef CONFIG_FSL_USDHC
22 #if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC2_BASE_ADDR
23 	gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
24 #elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC3_BASE_ADDR
25 	gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
26 #elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC4_BASE_ADDR
27 	gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
28 #else
29 	gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
30 #endif
31 #else
32 #if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR
33 	gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
34 #elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR
35 	gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
36 #elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC4_BASE_ADDR
37 	gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
38 #else
39 	gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
40 #endif
41 #endif
42 #endif
43 	return 0;
44 }
45