1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 277b55e8cSThomas Abraham /* Copyright (c) 2012 Samsung Electronics Co. Ltd 377b55e8cSThomas Abraham * 477b55e8cSThomas Abraham * Exynos Phy register definitions 577b55e8cSThomas Abraham */ 677b55e8cSThomas Abraham 777b55e8cSThomas Abraham #ifndef _ASM_ARCH_XHCI_EXYNOS_H_ 877b55e8cSThomas Abraham #define _ASM_ARCH_XHCI_EXYNOS_H_ 977b55e8cSThomas Abraham 1077b55e8cSThomas Abraham /* Phy register MACRO definitions */ 1177b55e8cSThomas Abraham 1277b55e8cSThomas Abraham #define LINKSYSTEM_FLADJ_MASK (0x3f << 1) 1377b55e8cSThomas Abraham #define LINKSYSTEM_FLADJ(_x) ((_x) << 1) 1477b55e8cSThomas Abraham #define LINKSYSTEM_XHCI_VERSION_CONTROL (0x1 << 27) 1577b55e8cSThomas Abraham 1677b55e8cSThomas Abraham #define PHYUTMI_OTGDISABLE (1 << 6) 1777b55e8cSThomas Abraham #define PHYUTMI_FORCESUSPEND (1 << 1) 1877b55e8cSThomas Abraham #define PHYUTMI_FORCESLEEP (1 << 0) 1977b55e8cSThomas Abraham 2077b55e8cSThomas Abraham #define PHYCLKRST_SSC_REFCLKSEL_MASK (0xff << 23) 2177b55e8cSThomas Abraham #define PHYCLKRST_SSC_REFCLKSEL(_x) ((_x) << 23) 2277b55e8cSThomas Abraham 2377b55e8cSThomas Abraham #define PHYCLKRST_SSC_RANGE_MASK (0x03 << 21) 2477b55e8cSThomas Abraham #define PHYCLKRST_SSC_RANGE(_x) ((_x) << 21) 2577b55e8cSThomas Abraham 2677b55e8cSThomas Abraham #define PHYCLKRST_SSC_EN (0x1 << 20) 2777b55e8cSThomas Abraham #define PHYCLKRST_REF_SSP_EN (0x1 << 19) 2877b55e8cSThomas Abraham #define PHYCLKRST_REF_CLKDIV2 (0x1 << 18) 2977b55e8cSThomas Abraham 3077b55e8cSThomas Abraham #define PHYCLKRST_MPLL_MULTIPLIER_MASK (0x7f << 11) 3177b55e8cSThomas Abraham #define PHYCLKRST_MPLL_MULTIPLIER_100MHZ_REF (0x19 << 11) 3277b55e8cSThomas Abraham #define PHYCLKRST_MPLL_MULTIPLIER_50M_REF (0x02 << 11) 3377b55e8cSThomas Abraham #define PHYCLKRST_MPLL_MULTIPLIER_24MHZ_REF (0x68 << 11) 3477b55e8cSThomas Abraham #define PHYCLKRST_MPLL_MULTIPLIER_20MHZ_REF (0x7d << 11) 3577b55e8cSThomas Abraham #define PHYCLKRST_MPLL_MULTIPLIER_19200KHZ_REF (0x02 << 11) 3677b55e8cSThomas Abraham 3777b55e8cSThomas Abraham #define PHYCLKRST_FSEL_MASK (0x3f << 5) 3877b55e8cSThomas Abraham #define PHYCLKRST_FSEL(_x) ((_x) << 5) 3977b55e8cSThomas Abraham #define PHYCLKRST_FSEL_PAD_100MHZ (0x27 << 5) 4077b55e8cSThomas Abraham #define PHYCLKRST_FSEL_PAD_24MHZ (0x2a << 5) 4177b55e8cSThomas Abraham #define PHYCLKRST_FSEL_PAD_20MHZ (0x31 << 5) 4277b55e8cSThomas Abraham #define PHYCLKRST_FSEL_PAD_19_2MHZ (0x38 << 5) 4377b55e8cSThomas Abraham 4477b55e8cSThomas Abraham #define PHYCLKRST_RETENABLEN (0x1 << 4) 4577b55e8cSThomas Abraham 4677b55e8cSThomas Abraham #define PHYCLKRST_REFCLKSEL_MASK (0x03 << 2) 4777b55e8cSThomas Abraham #define PHYCLKRST_REFCLKSEL_PAD_REFCLK (0x2 << 2) 4877b55e8cSThomas Abraham #define PHYCLKRST_REFCLKSEL_EXT_REFCLK (0x3 << 2) 4977b55e8cSThomas Abraham 5077b55e8cSThomas Abraham #define PHYCLKRST_PORTRESET (0x1 << 1) 5177b55e8cSThomas Abraham #define PHYCLKRST_COMMONONN (0x1 << 0) 5277b55e8cSThomas Abraham 5377b55e8cSThomas Abraham #define PHYPARAM0_REF_USE_PAD (0x1 << 31) 5477b55e8cSThomas Abraham #define PHYPARAM0_REF_LOSLEVEL_MASK (0x1f << 26) 5577b55e8cSThomas Abraham #define PHYPARAM0_REF_LOSLEVEL (0x9 << 26) 5677b55e8cSThomas Abraham 5777b55e8cSThomas Abraham #define PHYPARAM1_PCS_TXDEEMPH_MASK (0x1f << 0) 5877b55e8cSThomas Abraham #define PHYPARAM1_PCS_TXDEEMPH (0x1c) 5977b55e8cSThomas Abraham 6077b55e8cSThomas Abraham #define PHYTEST_POWERDOWN_SSP (0x1 << 3) 6177b55e8cSThomas Abraham #define PHYTEST_POWERDOWN_HSP (0x1 << 2) 6277b55e8cSThomas Abraham 6377b55e8cSThomas Abraham #define PHYBATCHG_UTMI_CLKSEL (0x1 << 2) 6477b55e8cSThomas Abraham 6577b55e8cSThomas Abraham #define FSEL_CLKSEL_24M (0x5) 6677b55e8cSThomas Abraham 6777b55e8cSThomas Abraham /* XHCI PHY register structure */ 6877b55e8cSThomas Abraham struct exynos_usb3_phy { 6977b55e8cSThomas Abraham unsigned int reserve1; 7077b55e8cSThomas Abraham unsigned int link_system; 7177b55e8cSThomas Abraham unsigned int phy_utmi; 7277b55e8cSThomas Abraham unsigned int phy_pipe; 7377b55e8cSThomas Abraham unsigned int phy_clk_rst; 7477b55e8cSThomas Abraham unsigned int phy_reg0; 7577b55e8cSThomas Abraham unsigned int phy_reg1; 7677b55e8cSThomas Abraham unsigned int phy_param0; 7777b55e8cSThomas Abraham unsigned int phy_param1; 7877b55e8cSThomas Abraham unsigned int phy_term; 7977b55e8cSThomas Abraham unsigned int phy_test; 8077b55e8cSThomas Abraham unsigned int phy_adp; 8177b55e8cSThomas Abraham unsigned int phy_batchg; 8277b55e8cSThomas Abraham unsigned int phy_resume; 8377b55e8cSThomas Abraham unsigned int reserve2[3]; 8477b55e8cSThomas Abraham unsigned int link_port; 8577b55e8cSThomas Abraham }; 8677b55e8cSThomas Abraham 8777b55e8cSThomas Abraham #endif /* _ASM_ARCH_XHCI_EXYNOS_H_ */ 88