1 /*
2  * Copyright (C) 2012 Samsung Electronics
3  *
4  * Author: InKi Dae <inki.dae@samsung.com>
5  * Author: Donghwa Lee <dh09.lee@samsung.com>
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef _DSIM_H
11 #define _DSIM_H
12 
13 #include <linux/list.h>
14 #include <linux/fb.h>
15 #include <lcd.h>
16 
17 #define PANEL_NAME_SIZE		(32)
18 
19 enum mipi_dsim_interface_type {
20 	DSIM_COMMAND,
21 	DSIM_VIDEO
22 };
23 
24 enum mipi_dsim_virtual_ch_no {
25 	DSIM_VIRTUAL_CH_0,
26 	DSIM_VIRTUAL_CH_1,
27 	DSIM_VIRTUAL_CH_2,
28 	DSIM_VIRTUAL_CH_3
29 };
30 
31 enum mipi_dsim_burst_mode_type {
32 	DSIM_NON_BURST_SYNC_EVENT,
33 	DSIM_BURST_SYNC_EVENT,
34 	DSIM_NON_BURST_SYNC_PULSE,
35 	DSIM_BURST,
36 	DSIM_NON_VIDEO_MODE
37 };
38 
39 enum mipi_dsim_no_of_data_lane {
40 	DSIM_DATA_LANE_1,
41 	DSIM_DATA_LANE_2,
42 	DSIM_DATA_LANE_3,
43 	DSIM_DATA_LANE_4
44 };
45 
46 enum mipi_dsim_byte_clk_src {
47 	DSIM_PLL_OUT_DIV8,
48 	DSIM_EXT_CLK_DIV8,
49 	DSIM_EXT_CLK_BYPASS
50 };
51 
52 enum mipi_dsim_pixel_format {
53 	DSIM_CMD_3BPP,
54 	DSIM_CMD_8BPP,
55 	DSIM_CMD_12BPP,
56 	DSIM_CMD_16BPP,
57 	DSIM_VID_16BPP_565,
58 	DSIM_VID_18BPP_666PACKED,
59 	DSIM_18BPP_666LOOSELYPACKED,
60 	DSIM_24BPP_888
61 };
62 
63 /* MIPI DSI Processor-to-Peripheral transaction types */
64 enum {
65 	MIPI_DSI_V_SYNC_START				= 0x01,
66 	MIPI_DSI_V_SYNC_END				= 0x11,
67 	MIPI_DSI_H_SYNC_START				= 0x21,
68 	MIPI_DSI_H_SYNC_END				= 0x31,
69 
70 	MIPI_DSI_COLOR_MODE_OFF				= 0x02,
71 	MIPI_DSI_COLOR_MODE_ON				= 0x12,
72 	MIPI_DSI_SHUTDOWN_PERIPHERAL			= 0x22,
73 	MIPI_DSI_TURN_ON_PERIPHERAL			= 0x32,
74 
75 	MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM		= 0x03,
76 	MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM		= 0x13,
77 	MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM		= 0x23,
78 
79 	MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM		= 0x04,
80 	MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM		= 0x14,
81 	MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM		= 0x24,
82 
83 	MIPI_DSI_DCS_SHORT_WRITE			= 0x05,
84 	MIPI_DSI_DCS_SHORT_WRITE_PARAM			= 0x15,
85 
86 	MIPI_DSI_DCS_READ				= 0x06,
87 
88 	MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE		= 0x37,
89 
90 	MIPI_DSI_END_OF_TRANSMISSION			= 0x08,
91 
92 	MIPI_DSI_NULL_PACKET				= 0x09,
93 	MIPI_DSI_BLANKING_PACKET			= 0x19,
94 	MIPI_DSI_GENERIC_LONG_WRITE			= 0x29,
95 	MIPI_DSI_DCS_LONG_WRITE				= 0x39,
96 
97 	MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20	= 0x0c,
98 	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24		= 0x1c,
99 	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16		= 0x2c,
100 
101 	MIPI_DSI_PACKED_PIXEL_STREAM_30			= 0x0d,
102 	MIPI_DSI_PACKED_PIXEL_STREAM_36			= 0x1d,
103 	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12		= 0x3d,
104 
105 	MIPI_DSI_PACKED_PIXEL_STREAM_16			= 0x0e,
106 	MIPI_DSI_PACKED_PIXEL_STREAM_18			= 0x1e,
107 	MIPI_DSI_PIXEL_STREAM_3BYTE_18			= 0x2e,
108 	MIPI_DSI_PACKED_PIXEL_STREAM_24			= 0x3e,
109 };
110 
111 /*
112  * struct mipi_dsim_config - interface for configuring mipi-dsi controller.
113  *
114  * @auto_flush: enable or disable Auto flush of MD FIFO using VSYNC pulse.
115  * @eot_disable: enable or disable EoT packet in HS mode.
116  * @auto_vertical_cnt: specifies auto vertical count mode.
117  *	in Video mode, the vertical line transition uses line counter
118  *	configured by VSA, VBP, and Vertical resolution.
119  *	If this bit is set to '1', the line counter does not use VSA and VBP
120  *	registers.(in command mode, this variable is ignored)
121  * @hse: set horizontal sync event mode.
122  *	In VSYNC pulse and Vporch area, MIPI DSI master transfers only HSYNC
123  *	start packet to MIPI DSI slave at MIPI DSI spec1.1r02.
124  *	this bit transfers HSYNC end packet in VSYNC pulse and Vporch area
125  *	(in mommand mode, this variable is ignored)
126  * @hfp: specifies HFP disable mode.
127  *	if this variable is set, DSI master ignores HFP area in VIDEO mode.
128  *	(in command mode, this variable is ignored)
129  * @hbp: specifies HBP disable mode.
130  *	if this variable is set, DSI master ignores HBP area in VIDEO mode.
131  *	(in command mode, this variable is ignored)
132  * @hsa: specifies HSA disable mode.
133  *	if this variable is set, DSI master ignores HSA area in VIDEO mode.
134  *	(in command mode, this variable is ignored)
135  * @e_interface: specifies interface to be used.(CPU or RGB interface)
136  * @e_virtual_ch: specifies virtual channel number that main or
137  *	sub diaplsy uses.
138  * @e_pixel_format: specifies pixel stream format for main or sub display.
139  * @e_burst_mode: selects Burst mode in Video mode.
140  *	in Non-burst mode, RGB data area is filled with RGB data and NULL
141  *	packets, according to input bandwidth of RGB interface.
142  *	In Burst mode, RGB data area is filled with RGB data only.
143  * @e_no_data_lane: specifies data lane count to be used by Master.
144  * @e_byte_clk: select byte clock source. (it must be DSIM_PLL_OUT_DIV8)
145  *	DSIM_EXT_CLK_DIV8 and DSIM_EXT_CLK_BYPASSS are not supported.
146  * @pll_stable_time: specifies the PLL Timer for stability of the ganerated
147  *	clock(System clock cycle base)
148  *	if the timer value goes to 0x00000000, the clock stable bit of status
149  *	and interrupt register is set.
150  * @esc_clk: specifies escape clock frequency for getting the escape clock
151  *	prescaler value.
152  * @stop_holding_cnt: specifies the interval value between transmitting
153  *	read packet(or write "set_tear_on" command) and BTA request.
154  *	after transmitting read packet or write "set_tear_on" command,
155  *	BTA requests to D-PHY automatically. this counter value specifies
156  *	the interval between them.
157  * @bta_timeout: specifies the timer for BTA.
158  *	this register specifies time out from BTA request to change
159  *	the direction with respect to Tx escape clock.
160  * @rx_timeout: specifies the timer for LP Rx mode timeout.
161  *	this register specifies time out on how long RxValid deasserts,
162  *	after RxLpdt asserts with respect to Tx escape clock.
163  *	- RxValid specifies Rx data valid indicator.
164  *	- RxLpdt specifies an indicator that D-PHY is under RxLpdt mode.
165  *	- RxValid and RxLpdt specifies signal from D-PHY.
166  */
167 struct mipi_dsim_config {
168 	unsigned char			auto_flush;
169 	unsigned char			eot_disable;
170 
171 	unsigned char			auto_vertical_cnt;
172 	unsigned char			hse;
173 	unsigned char			hfp;
174 	unsigned char			hbp;
175 	unsigned char			hsa;
176 
177 	enum mipi_dsim_interface_type	e_interface;
178 	enum mipi_dsim_virtual_ch_no	e_virtual_ch;
179 	enum mipi_dsim_pixel_format	e_pixel_format;
180 	enum mipi_dsim_burst_mode_type	e_burst_mode;
181 	enum mipi_dsim_no_of_data_lane	e_no_data_lane;
182 	enum mipi_dsim_byte_clk_src	e_byte_clk;
183 
184 	/*
185 	 * ===========================================
186 	 * |    P    |    M    |    S    |    MHz    |
187 	 * -------------------------------------------
188 	 * |    3    |   100   |    3    |    100    |
189 	 * |    3    |   100   |    2    |    200    |
190 	 * |    3    |    63   |    1    |    252    |
191 	 * |    4    |   100   |    1    |    300    |
192 	 * |    4    |   110   |    1    |    330    |
193 	 * |   12    |   350   |    1    |    350    |
194 	 * |    3    |   100   |    1    |    400    |
195 	 * |    4    |   150   |    1    |    450    |
196 	 * |    6    |   118   |    1    |    472    |
197 	 * |	3    |   120   |    1    |    480    |
198 	 * |   12    |   250   |    0    |    500    |
199 	 * |    4    |   100   |    0    |    600    |
200 	 * |    3    |    81   |    0    |    648    |
201 	 * |    3    |    88   |    0    |    704    |
202 	 * |    3    |    90   |    0    |    720    |
203 	 * |    3    |   100   |    0    |    800    |
204 	 * |   12    |   425   |    0    |    850    |
205 	 * |    4    |   150   |    0    |    900    |
206 	 * |   12    |   475   |    0    |    950    |
207 	 * |    6    |   250   |    0    |   1000    |
208 	 * -------------------------------------------
209 	 */
210 
211 	/*
212 	 * pms could be calculated as the following.
213 	 * M * 24 / P * 2 ^ S = MHz
214 	 */
215 	unsigned char			p;
216 	unsigned short			m;
217 	unsigned char			s;
218 
219 	unsigned int			pll_stable_time;
220 	unsigned long			esc_clk;
221 
222 	unsigned short			stop_holding_cnt;
223 	unsigned char			bta_timeout;
224 	unsigned short			rx_timeout;
225 };
226 
227 /*
228  * struct mipi_dsim_device - global interface for mipi-dsi driver.
229  *
230  * @dsim_config: infomation for configuring mipi-dsi controller.
231  * @master_ops: callbacks to mipi-dsi operations.
232  * @dsim_lcd_dev: pointer to activated ddi device.
233  *	(it would be registered by mipi-dsi driver.)
234  * @dsim_lcd_drv: pointer to activated_ddi driver.
235  *	(it would be registered by mipi-dsi driver.)
236  * @state: specifies status of MIPI-DSI controller.
237  *	the status could be RESET, INIT, STOP, HSCLKEN and ULPS.
238  * @data_lane: specifiec enabled data lane number.
239  *	this variable would be set by driver according to e_no_data_lane
240  *	automatically.
241  * @e_clk_src: select byte clock source.
242  * @pd: pointer to MIPI-DSI driver platform data.
243  */
244 struct mipi_dsim_device {
245 	struct mipi_dsim_config		*dsim_config;
246 	struct mipi_dsim_master_ops	*master_ops;
247 	struct mipi_dsim_lcd_device	*dsim_lcd_dev;
248 	struct mipi_dsim_lcd_driver	*dsim_lcd_drv;
249 
250 	unsigned int			state;
251 	unsigned int			data_lane;
252 	enum mipi_dsim_byte_clk_src	e_clk_src;
253 
254 	struct exynos_platform_mipi_dsim	*pd;
255 };
256 
257 /*
258  * struct exynos_platform_mipi_dsim - interface to platform data
259  *	for mipi-dsi driver.
260  *
261  * @lcd_panel_name: specifies lcd panel name registered to mipi-dsi driver.
262  *	lcd panel driver searched would be actived.
263  * @dsim_config: pointer of structure for configuring mipi-dsi controller.
264  * @lcd_panel_info: pointer for lcd panel specific structure.
265  *	this structure specifies width, height, timing and polarity and so on.
266  * @lcd_power: callback pointer for enabling or disabling lcd power.
267  * @mipi_power: callback pointer for enabling or disabling mipi power.
268  * @phy_enable: pointer to a callback controlling D-PHY enable/reset
269  */
270 struct exynos_platform_mipi_dsim {
271 	char				lcd_panel_name[PANEL_NAME_SIZE];
272 
273 	struct mipi_dsim_config		*dsim_config;
274 	void				*lcd_panel_info;
275 
276 	int (*lcd_power)(void);
277 	int (*mipi_power)(void);
278 	void (*phy_enable)(unsigned int dev_index, unsigned int enable);
279 };
280 
281 /*
282  * struct mipi_dsim_master_ops - callbacks to mipi-dsi operations.
283  *
284  * @cmd_write: transfer command to lcd panel at LP mode.
285  * @cmd_read: read command from rx register.
286  * @get_dsim_frame_done: get the status that all screen data have been
287  *	transferred to mipi-dsi.
288  * @clear_dsim_frame_done: clear frame done status.
289  * @get_fb_frame_done: get frame done status of display controller.
290  * @trigger: trigger display controller.
291  *	- this one would be used only in case of CPU mode.
292  */
293 struct mipi_dsim_master_ops {
294 	int (*cmd_write)(struct mipi_dsim_device *dsim, unsigned int data_id,
295 		const unsigned char *data0, unsigned int data1);
296 	int (*cmd_read)(struct mipi_dsim_device *dsim, unsigned int data_id,
297 		unsigned int data0, unsigned int data1);
298 	int (*get_dsim_frame_done)(struct mipi_dsim_device *dsim);
299 	int (*clear_dsim_frame_done)(struct mipi_dsim_device *dsim);
300 
301 	int (*get_fb_frame_done)(void);
302 	void (*trigger)(struct fb_info *info);
303 };
304 
305 /*
306  * device structure for mipi-dsi based lcd panel.
307  *
308  * @name: name of the device to use with this device, or an
309  *	alias for that name.
310  * @id: id of device to be registered.
311  * @bus_id: bus id for identifing connected bus
312  *	and this bus id should be same as id of mipi_dsim_device.
313  * @master: pointer to mipi-dsi master device object.
314  * @platform_data: lcd panel specific platform data.
315  */
316 struct mipi_dsim_lcd_device {
317 	char			*name;
318 	int			id;
319 	int			bus_id;
320 	int			reverse_panel;
321 
322 	struct mipi_dsim_device *master;
323 	void			*platform_data;
324 };
325 
326 /*
327  * driver structure for mipi-dsi based lcd panel.
328  *
329  * this structure should be registered by lcd panel driver.
330  * mipi-dsi driver seeks lcd panel registered through name field
331  * and calls these callback functions in appropriate time.
332  *
333  * @name: name of the driver to use with this device, or an
334  *	alias for that name.
335  * @id: id of driver to be registered.
336  *	this id would be used for finding device object registered.
337  * @mipi_panel_init: callback pointer for initializing lcd panel based on mipi
338  *	dsi interface.
339  * @mipi_display_on: callback pointer for lcd panel display on.
340  */
341 struct mipi_dsim_lcd_driver {
342 	char			*name;
343 	int			id;
344 
345 	int	(*mipi_panel_init)(struct mipi_dsim_device *dsim_dev);
346 	void	(*mipi_display_on)(struct mipi_dsim_device *dsim_dev);
347 };
348 
349 #ifdef CONFIG_EXYNOS_MIPI_DSIM
350 int exynos_mipi_dsi_init(void);
351 #else
352 static inline int exynos_mipi_dsi_init(void)
353 {
354 	return 0;
355 }
356 #endif
357 
358 /*
359  * register mipi_dsim_lcd_driver object defined by lcd panel driver
360  * to mipi-dsi driver.
361  */
362 int exynos_mipi_dsi_register_lcd_driver(struct mipi_dsim_lcd_driver
363 						*lcd_drv);
364 
365 /*
366  * register mipi_dsim_lcd_device to mipi-dsi master.
367  */
368 int exynos_mipi_dsi_register_lcd_device(struct mipi_dsim_lcd_device
369 						*lcd_dev);
370 
371 void exynos_set_dsim_platform_data(struct exynos_platform_mipi_dsim *pd);
372 void exynos_init_dsim_platform_data(vidinfo_t *vid);
373 
374 /* panel driver init based on mipi dsi interface */
375 void s6e8ax0_init(void);
376 
377 extern int mipi_power(void);
378 #endif /* _DSIM_H */
379