1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2009 Texas Instruments Incorporated
4  */
5 #ifndef _GPIO_DEFS_H_
6 #define _GPIO_DEFS_H_
7 
8 #ifndef CONFIG_SOC_DA8XX
9 #define DAVINCI_GPIO_BINTEN	0x01C67008
10 #define DAVINCI_GPIO_BANK01	0x01C67010
11 #define DAVINCI_GPIO_BANK23	0x01C67038
12 #define DAVINCI_GPIO_BANK45	0x01C67060
13 #define DAVINCI_GPIO_BANK67	0x01C67088
14 
15 #else /* CONFIG_SOC_DA8XX */
16 #define DAVINCI_GPIO_BINTEN	0x01E26008
17 #define DAVINCI_GPIO_BANK01	0x01E26010
18 #define DAVINCI_GPIO_BANK23	0x01E26038
19 #define DAVINCI_GPIO_BANK45	0x01E26060
20 #define DAVINCI_GPIO_BANK67	0x01E26088
21 #define DAVINCI_GPIO_BANK8	0x01E260B0
22 #endif /* CONFIG_SOC_DA8XX */
23 
24 struct davinci_gpio {
25 	unsigned int dir;
26 	unsigned int out_data;
27 	unsigned int set_data;
28 	unsigned int clr_data;
29 	unsigned int in_data;
30 	unsigned int set_rising;
31 	unsigned int clr_rising;
32 	unsigned int set_falling;
33 	unsigned int clr_falling;
34 	unsigned int intstat;
35 };
36 
37 struct davinci_gpio_bank {
38 	int num_gpio;
39 	unsigned int irq_num;
40 	unsigned int irq_mask;
41 	unsigned long *in_use;
42 	unsigned long base;
43 };
44 
45 #define davinci_gpio_bank01 ((struct davinci_gpio *)DAVINCI_GPIO_BANK01)
46 #define davinci_gpio_bank23 ((struct davinci_gpio *)DAVINCI_GPIO_BANK23)
47 #define davinci_gpio_bank45 ((struct davinci_gpio *)DAVINCI_GPIO_BANK45)
48 #define davinci_gpio_bank67 ((struct davinci_gpio *)DAVINCI_GPIO_BANK67)
49 #define davinci_gpio_bank8 ((struct davinci_gpio *)DAVINCI_GPIO_BANK8)
50 
51 #define gpio_status()		gpio_info()
52 #define GPIO_NAME_SIZE		20
53 #if defined(CONFIG_SOC_DM644X)
54 /* GPIO0 to GPIO53, omit the V3.3 volts one */
55 #define MAX_NUM_GPIOS		70
56 #elif defined(CONFIG_SOC_DA8XX) && !defined(CONFIG_SOC_DA850)
57 #define MAX_NUM_GPIOS		128
58 #else
59 #define MAX_NUM_GPIOS		144
60 #endif
61 #define GPIO_BANK(gp)		(davinci_gpio_bank01 + ((gp) >> 5))
62 #define GPIO_BIT(gp)		((gp) & 0x1F)
63 
64 void gpio_info(void);
65 
66 #endif
67