1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2011
4  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
5  */
6 #ifndef _DV_AINTC_DEFS_H_
7 #define _DV_AINTC_DEFS_H_
8 
9 struct dv_aintc_regs {
10 	unsigned int	fiq0;		/* 0x00 */
11 	unsigned int	fiq1;		/* 0x04 */
12 	unsigned int	irq0;		/* 0x08 */
13 	unsigned int	irq1;		/* 0x0c */
14 	unsigned int	fiqentry;	/* 0x10 */
15 	unsigned int	irqentry;	/* 0x14 */
16 	unsigned int	eint0;		/* 0x18 */
17 	unsigned int	eint1;		/* 0x1c */
18 	unsigned int	intctl;		/* 0x20 */
19 	unsigned int	eabase;		/* 0x24 */
20 	unsigned char	rsvd0[8];	/* 0x28 */
21 	unsigned int	intpri0;	/* 0x30 */
22 	unsigned int	intpri1;	/* 0x34 */
23 	unsigned int	intpri2;	/* 0x38 */
24 	unsigned int	intpri3;	/* 0x3c */
25 	unsigned int	intpri4;	/* 0x40 */
26 	unsigned int	intpri5;	/* 0x44 */
27 	unsigned int	intpri6;	/* 0x48 */
28 	unsigned int	intpri7;	/* 0x4c */
29 };
30 
31 #define dv_aintc_regs ((struct dv_aintc_regs *)DAVINCI_ARM_INTC_BASE)
32 
33 #define DV_AINTC_INTCTL_IDMODE	(1 << 2)
34 
35 #endif /* _DV_AINTC_DEFS_H_ */
36