1if ARCH_DAVINCI 2 3choice 4 prompt "DaVinci board select" 5 optional 6 7config TARGET_IPAM390 8 bool "IPAM390 board" 9 select MACH_DAVINCI_DA850_EVM 10 select SOC_DA850 11 select SUPPORT_SPL 12 13config TARGET_DA850EVM 14 bool "DA850 EVM board" 15 select MACH_DAVINCI_DA850_EVM 16 select SOC_DA850 17 select SUPPORT_SPL 18 19config TARGET_EA20 20 bool "EA20 board" 21 select MACH_DAVINCI_DA850_EVM 22 select SOC_DA850 23 select BOARD_LATE_INIT 24 25config TARGET_OMAPL138_LCDK 26 bool "OMAPL138 LCDK" 27 select SOC_DA8XX 28 select SUPPORT_SPL 29 30config TARGET_CALIMAIN 31 bool "Calimain board" 32 select SOC_DA850 33 34config TARGET_LEGOEV3 35 bool "LEGO MINDSTORMS EV3" 36 select MACH_DAVINCI_DA850_EVM 37 select SOC_DA850 38 39endchoice 40 41config SYS_SOC 42 default "davinci" 43 44config DA850_LOWLEVEL 45 bool "Enable Lowlevel DA850 initialization" 46 depends on SOC_DA850 47 48config SYS_DA850_PLL_INIT 49 bool 50 51config SYS_DA850_DDR_INIT 52 bool 53 54config SOC_DA850 55 bool 56 select SOC_DA8XX 57 58config SOC_DA8XX 59 bool 60 select SYS_DA850_PLL_INIT if SUPPORT_SPL || DA850_LOWLEVEL 61 62config MACH_DAVINCI_DA850_EVM 63 bool 64 65if SYS_DA850_PLL_INIT 66comment "DA850 PLL Initialization Parameters" 67 68config SYS_DV_CLKMODE 69 int "PLLCTL Clock Mode" 70 default 0 71 help 72 Set PLLCTL Clock Mode bit as External Clock or On Chip oscillator 73 74config SYS_DA850_PLL0_POSTDIV 75 int "PLLC0 PLL Post-Divider" 76 default 1 77 help 78 Value written to PLLC0 PLL Post-Divider Control Register 79 80config SYS_DA850_PLL0_PLLDIV1 81 hex "PLLC0 Divider 1" 82 default 0x8000 83 help 84 Value written to PLLC0 Divider 1 register 85 86config SYS_DA850_PLL0_PLLDIV2 87 hex "PLLC0 Divider 2" 88 default 0x8001 89 help 90 Value written to PLLC0 Divider 2 register 91 92config SYS_DA850_PLL0_PLLDIV3 93 hex "PLLC0 Divider 3" 94 default 0x8002 95 help 96 Value written to PLLC0 Divider 3 register 97 98config SYS_DA850_PLL0_PLLDIV4 99 hex "PLLC0 Divider 4" 100 default 0x8003 101 help 102 Value written to PLLC0 Divider 4 register 103 104config SYS_DA850_PLL0_PLLDIV5 105 hex "PLLC0 Divider 5" 106 default 0x8002 107 help 108 Value written to PLLC0 Divider 5 register 109 110config SYS_DA850_PLL0_PLLDIV6 111 hex "PLLC0 Divider 6" 112 default 0x8000 113 help 114 Value written to PLLC0 Divider 6 register 115 116config SYS_DA850_PLL0_PLLDIV7 117 hex "PLLC0 Divider 7" 118 default 0x8005 119 help 120 Value written to PLLC0 Divider 7 register 121 122config SYS_DA850_PLL1_POSTDIV 123 hex "PLLC1 PLL Post-Divider" 124 default 1 125 help 126 Value written to PLLC1 PLL Post-Divider Control Register 127 128config SYS_DA850_PLL1_PLLDIV1 129 hex "PLLC1 Divider 2" 130 default 0x8000 131 help 132 Value written to PLLC1 Divider 1 register 133 134config SYS_DA850_PLL1_PLLDIV2 135 hex "PLLC1 Divider 2" 136 default 0x8001 137 help 138 Value written to PLLC1 Divider 2 register 139 140config SYS_DA850_PLL1_PLLDIV3 141 hex "PLLC1 Divider 3" 142 default 0x8002 143 help 144 Value written to PLLC1 Divider 3 register 145 146endif 147 148source "board/Barix/ipam390/Kconfig" 149source "board/davinci/da8xxevm/Kconfig" 150source "board/davinci/ea20/Kconfig" 151source "board/omicron/calimain/Kconfig" 152source "board/lego/ev3/Kconfig" 153 154config SPL_LDSCRIPT 155 default "board/$(BOARDDIR)/u-boot-spl-ipam390.lds" if TARGET_IPAM390 156 default "board/$(BOARDDIR)/u-boot-spl-da850evm.lds" 157 158endif 159