1 /* 2 * (C) Copyright 2012,2015 Stephen Warren 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _BCM2835_MBOX_H 8 #define _BCM2835_MBOX_H 9 10 #include <linux/compiler.h> 11 12 /* 13 * The BCM2835 SoC contains (at least) two CPUs; the VideoCore (a/k/a "GPU") 14 * and the ARM CPU. The ARM CPU is often thought of as the main CPU. 15 * However, the VideoCore actually controls the initial SoC boot, and hides 16 * much of the hardware behind a protocol. This protocol is transported 17 * using the SoC's mailbox hardware module. 18 * 19 * The mailbox hardware supports passing 32-bit values back and forth. 20 * Presumably by software convention of the firmware, the bottom 4 bits of the 21 * value are used to indicate a logical channel, and the upper 28 bits are the 22 * actual payload. Various channels exist using these simple raw messages. See 23 * https://github.com/raspberrypi/firmware/wiki/Mailboxes for a list. As an 24 * example, the messages on the power management channel are a bitmask of 25 * devices whose power should be enabled. 26 * 27 * The property mailbox channel passes messages that contain the (16-byte 28 * aligned) ARM physical address of a memory buffer. This buffer is passed to 29 * the VC for processing, is modified in-place by the VC, and the address then 30 * passed back to the ARM CPU as the response mailbox message to indicate 31 * request completion. The buffers have a generic and extensible format; each 32 * buffer contains a standard header, a list of "tags", and a terminating zero 33 * entry. Each tag contains an ID indicating its type, and length fields for 34 * generic parsing. With some limitations, an arbitrary set of tags may be 35 * combined together into a single message buffer. This file defines structs 36 * representing the header and many individual tag layouts and IDs. 37 */ 38 39 /* Raw mailbox HW */ 40 41 #ifdef CONFIG_BCM2836 42 #define BCM2835_MBOX_PHYSADDR 0x3f00b880 43 #else 44 #define BCM2835_MBOX_PHYSADDR 0x2000b880 45 #endif 46 47 struct bcm2835_mbox_regs { 48 u32 read; 49 u32 rsvd0[5]; 50 u32 status; 51 u32 config; 52 u32 write; 53 }; 54 55 #define BCM2835_MBOX_STATUS_WR_FULL 0x80000000 56 #define BCM2835_MBOX_STATUS_RD_EMPTY 0x40000000 57 58 /* Lower 4-bits are channel ID */ 59 #define BCM2835_CHAN_MASK 0xf 60 #define BCM2835_MBOX_PACK(chan, data) (((data) & (~BCM2835_CHAN_MASK)) | \ 61 (chan & BCM2835_CHAN_MASK)) 62 #define BCM2835_MBOX_UNPACK_CHAN(val) ((val) & BCM2835_CHAN_MASK) 63 #define BCM2835_MBOX_UNPACK_DATA(val) ((val) & (~BCM2835_CHAN_MASK)) 64 65 /* Property mailbox buffer structures */ 66 67 #define BCM2835_MBOX_PROP_CHAN 8 68 69 /* All message buffers must start with this header */ 70 struct bcm2835_mbox_hdr { 71 u32 buf_size; 72 u32 code; 73 }; 74 75 #define BCM2835_MBOX_REQ_CODE 0 76 #define BCM2835_MBOX_RESP_CODE_SUCCESS 0x80000000 77 78 #define BCM2835_MBOX_INIT_HDR(_m_) { \ 79 memset((_m_), 0, sizeof(*(_m_))); \ 80 (_m_)->hdr.buf_size = sizeof(*(_m_)); \ 81 (_m_)->hdr.code = 0; \ 82 (_m_)->end_tag = 0; \ 83 } 84 85 /* 86 * A message buffer contains a list of tags. Each tag must also start with 87 * a standardized header. 88 */ 89 struct bcm2835_mbox_tag_hdr { 90 u32 tag; 91 u32 val_buf_size; 92 u32 val_len; 93 }; 94 95 #define BCM2835_MBOX_INIT_TAG(_t_, _id_) { \ 96 (_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \ 97 (_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \ 98 (_t_)->tag_hdr.val_len = sizeof((_t_)->body.req); \ 99 } 100 101 #define BCM2835_MBOX_INIT_TAG_NO_REQ(_t_, _id_) { \ 102 (_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \ 103 (_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \ 104 (_t_)->tag_hdr.val_len = 0; \ 105 } 106 107 /* When responding, the VC sets this bit in val_len to indicate a response */ 108 #define BCM2835_MBOX_TAG_VAL_LEN_RESPONSE 0x80000000 109 110 /* 111 * Below we define the ID and struct for many possible tags. This header only 112 * defines individual tag structs, not entire message structs, since in 113 * general an arbitrary set of tags may be combined into a single message. 114 * Clients of the mbox API are expected to define their own overall message 115 * structures by combining the header, a set of tags, and a terminating 116 * entry. For example, 117 * 118 * struct msg { 119 * struct bcm2835_mbox_hdr hdr; 120 * struct bcm2835_mbox_tag_get_arm_mem get_arm_mem; 121 * ... perhaps other tags here ... 122 * u32 end_tag; 123 * }; 124 */ 125 126 #define BCM2835_MBOX_TAG_GET_BOARD_REV 0x00010002 127 128 #ifdef CONFIG_BCM2836 129 #define BCM2836_BOARD_REV_2_B 0x4 130 #else 131 /* 132 * 0x2..0xf from: 133 * http://raspberryalphaomega.org.uk/2013/02/06/automatic-raspberry-pi-board-revision-detection-model-a-b1-and-b2/ 134 * http://www.raspberrypi.org/forums/viewtopic.php?f=63&t=32733 135 * 0x10, 0x11 from swarren's testing 136 */ 137 #define BCM2835_BOARD_REV_B_I2C0_2 0x2 138 #define BCM2835_BOARD_REV_B_I2C0_3 0x3 139 #define BCM2835_BOARD_REV_B_I2C1_4 0x4 140 #define BCM2835_BOARD_REV_B_I2C1_5 0x5 141 #define BCM2835_BOARD_REV_B_I2C1_6 0x6 142 #define BCM2835_BOARD_REV_A_7 0x7 143 #define BCM2835_BOARD_REV_A_8 0x8 144 #define BCM2835_BOARD_REV_A_9 0x9 145 #define BCM2835_BOARD_REV_B_REV2_d 0xd 146 #define BCM2835_BOARD_REV_B_REV2_e 0xe 147 #define BCM2835_BOARD_REV_B_REV2_f 0xf 148 #define BCM2835_BOARD_REV_B_PLUS 0x10 149 #define BCM2835_BOARD_REV_CM 0x11 150 #define BCM2835_BOARD_REV_A_PLUS 0x12 151 #endif 152 153 struct bcm2835_mbox_tag_get_board_rev { 154 struct bcm2835_mbox_tag_hdr tag_hdr; 155 union { 156 struct { 157 } req; 158 struct { 159 u32 rev; 160 } resp; 161 } body; 162 }; 163 164 #define BCM2835_MBOX_TAG_GET_MAC_ADDRESS 0x00010003 165 166 struct bcm2835_mbox_tag_get_mac_address { 167 struct bcm2835_mbox_tag_hdr tag_hdr; 168 union { 169 struct { 170 } req; 171 struct { 172 u8 mac[6]; 173 u8 pad[2]; 174 } resp; 175 } body; 176 }; 177 178 #define BCM2835_MBOX_TAG_GET_ARM_MEMORY 0x00010005 179 180 struct bcm2835_mbox_tag_get_arm_mem { 181 struct bcm2835_mbox_tag_hdr tag_hdr; 182 union { 183 struct { 184 } req; 185 struct { 186 u32 mem_base; 187 u32 mem_size; 188 } resp; 189 } body; 190 }; 191 192 #define BCM2835_MBOX_POWER_DEVID_SDHCI 0 193 #define BCM2835_MBOX_POWER_DEVID_UART0 1 194 #define BCM2835_MBOX_POWER_DEVID_UART1 2 195 #define BCM2835_MBOX_POWER_DEVID_USB_HCD 3 196 #define BCM2835_MBOX_POWER_DEVID_I2C0 4 197 #define BCM2835_MBOX_POWER_DEVID_I2C1 5 198 #define BCM2835_MBOX_POWER_DEVID_I2C2 6 199 #define BCM2835_MBOX_POWER_DEVID_SPI 7 200 #define BCM2835_MBOX_POWER_DEVID_CCP2TX 8 201 202 #define BCM2835_MBOX_POWER_STATE_RESP_ON (1 << 0) 203 /* Device doesn't exist */ 204 #define BCM2835_MBOX_POWER_STATE_RESP_NODEV (1 << 1) 205 206 #define BCM2835_MBOX_TAG_GET_POWER_STATE 0x00020001 207 208 struct bcm2835_mbox_tag_get_power_state { 209 struct bcm2835_mbox_tag_hdr tag_hdr; 210 union { 211 struct { 212 u32 device_id; 213 } req; 214 struct { 215 u32 device_id; 216 u32 state; 217 } resp; 218 } body; 219 }; 220 221 #define BCM2835_MBOX_TAG_SET_POWER_STATE 0x00028001 222 223 #define BCM2835_MBOX_SET_POWER_STATE_REQ_ON (1 << 0) 224 #define BCM2835_MBOX_SET_POWER_STATE_REQ_WAIT (1 << 1) 225 226 struct bcm2835_mbox_tag_set_power_state { 227 struct bcm2835_mbox_tag_hdr tag_hdr; 228 union { 229 struct { 230 u32 device_id; 231 u32 state; 232 } req; 233 struct { 234 u32 device_id; 235 u32 state; 236 } resp; 237 } body; 238 }; 239 240 #define BCM2835_MBOX_TAG_GET_CLOCK_RATE 0x00030002 241 242 #define BCM2835_MBOX_CLOCK_ID_EMMC 1 243 #define BCM2835_MBOX_CLOCK_ID_UART 2 244 #define BCM2835_MBOX_CLOCK_ID_ARM 3 245 #define BCM2835_MBOX_CLOCK_ID_CORE 4 246 #define BCM2835_MBOX_CLOCK_ID_V3D 5 247 #define BCM2835_MBOX_CLOCK_ID_H264 6 248 #define BCM2835_MBOX_CLOCK_ID_ISP 7 249 #define BCM2835_MBOX_CLOCK_ID_SDRAM 8 250 #define BCM2835_MBOX_CLOCK_ID_PIXEL 9 251 #define BCM2835_MBOX_CLOCK_ID_PWM 10 252 253 struct bcm2835_mbox_tag_get_clock_rate { 254 struct bcm2835_mbox_tag_hdr tag_hdr; 255 union { 256 struct { 257 u32 clock_id; 258 } req; 259 struct { 260 u32 clock_id; 261 u32 rate_hz; 262 } resp; 263 } body; 264 }; 265 266 #define BCM2835_MBOX_TAG_ALLOCATE_BUFFER 0x00040001 267 268 struct bcm2835_mbox_tag_allocate_buffer { 269 struct bcm2835_mbox_tag_hdr tag_hdr; 270 union { 271 struct { 272 u32 alignment; 273 } req; 274 struct { 275 u32 fb_address; 276 u32 fb_size; 277 } resp; 278 } body; 279 }; 280 281 #define BCM2835_MBOX_TAG_RELEASE_BUFFER 0x00048001 282 283 struct bcm2835_mbox_tag_release_buffer { 284 struct bcm2835_mbox_tag_hdr tag_hdr; 285 union { 286 struct { 287 } req; 288 struct { 289 } resp; 290 } body; 291 }; 292 293 #define BCM2835_MBOX_TAG_BLANK_SCREEN 0x00040002 294 295 struct bcm2835_mbox_tag_blank_screen { 296 struct bcm2835_mbox_tag_hdr tag_hdr; 297 union { 298 struct { 299 /* bit 0 means on, other bots reserved */ 300 u32 state; 301 } req; 302 struct { 303 u32 state; 304 } resp; 305 } body; 306 }; 307 308 /* Physical means output signal */ 309 #define BCM2835_MBOX_TAG_GET_PHYSICAL_W_H 0x00040003 310 #define BCM2835_MBOX_TAG_TEST_PHYSICAL_W_H 0x00044003 311 #define BCM2835_MBOX_TAG_SET_PHYSICAL_W_H 0x00048003 312 313 struct bcm2835_mbox_tag_physical_w_h { 314 struct bcm2835_mbox_tag_hdr tag_hdr; 315 union { 316 /* req not used for get */ 317 struct { 318 u32 width; 319 u32 height; 320 } req; 321 struct { 322 u32 width; 323 u32 height; 324 } resp; 325 } body; 326 }; 327 328 /* Virtual means display buffer */ 329 #define BCM2835_MBOX_TAG_GET_VIRTUAL_W_H 0x00040004 330 #define BCM2835_MBOX_TAG_TEST_VIRTUAL_W_H 0x00044004 331 #define BCM2835_MBOX_TAG_SET_VIRTUAL_W_H 0x00048004 332 333 struct bcm2835_mbox_tag_virtual_w_h { 334 struct bcm2835_mbox_tag_hdr tag_hdr; 335 union { 336 /* req not used for get */ 337 struct { 338 u32 width; 339 u32 height; 340 } req; 341 struct { 342 u32 width; 343 u32 height; 344 } resp; 345 } body; 346 }; 347 348 #define BCM2835_MBOX_TAG_GET_DEPTH 0x00040005 349 #define BCM2835_MBOX_TAG_TEST_DEPTH 0x00044005 350 #define BCM2835_MBOX_TAG_SET_DEPTH 0x00048005 351 352 struct bcm2835_mbox_tag_depth { 353 struct bcm2835_mbox_tag_hdr tag_hdr; 354 union { 355 /* req not used for get */ 356 struct { 357 u32 bpp; 358 } req; 359 struct { 360 u32 bpp; 361 } resp; 362 } body; 363 }; 364 365 #define BCM2835_MBOX_TAG_GET_PIXEL_ORDER 0x00040006 366 #define BCM2835_MBOX_TAG_TEST_PIXEL_ORDER 0x00044005 367 #define BCM2835_MBOX_TAG_SET_PIXEL_ORDER 0x00048006 368 369 #define BCM2835_MBOX_PIXEL_ORDER_BGR 0 370 #define BCM2835_MBOX_PIXEL_ORDER_RGB 1 371 372 struct bcm2835_mbox_tag_pixel_order { 373 struct bcm2835_mbox_tag_hdr tag_hdr; 374 union { 375 /* req not used for get */ 376 struct { 377 u32 order; 378 } req; 379 struct { 380 u32 order; 381 } resp; 382 } body; 383 }; 384 385 #define BCM2835_MBOX_TAG_GET_ALPHA_MODE 0x00040007 386 #define BCM2835_MBOX_TAG_TEST_ALPHA_MODE 0x00044007 387 #define BCM2835_MBOX_TAG_SET_ALPHA_MODE 0x00048007 388 389 #define BCM2835_MBOX_ALPHA_MODE_0_OPAQUE 0 390 #define BCM2835_MBOX_ALPHA_MODE_0_TRANSPARENT 1 391 #define BCM2835_MBOX_ALPHA_MODE_IGNORED 2 392 393 struct bcm2835_mbox_tag_alpha_mode { 394 struct bcm2835_mbox_tag_hdr tag_hdr; 395 union { 396 /* req not used for get */ 397 struct { 398 u32 alpha; 399 } req; 400 struct { 401 u32 alpha; 402 } resp; 403 } body; 404 }; 405 406 #define BCM2835_MBOX_TAG_GET_PITCH 0x00040008 407 408 struct bcm2835_mbox_tag_pitch { 409 struct bcm2835_mbox_tag_hdr tag_hdr; 410 union { 411 struct { 412 } req; 413 struct { 414 u32 pitch; 415 } resp; 416 } body; 417 }; 418 419 /* Offset of display window within buffer */ 420 #define BCM2835_MBOX_TAG_GET_VIRTUAL_OFFSET 0x00040009 421 #define BCM2835_MBOX_TAG_TEST_VIRTUAL_OFFSET 0x00044009 422 #define BCM2835_MBOX_TAG_SET_VIRTUAL_OFFSET 0x00048009 423 424 struct bcm2835_mbox_tag_virtual_offset { 425 struct bcm2835_mbox_tag_hdr tag_hdr; 426 union { 427 /* req not used for get */ 428 struct { 429 u32 x; 430 u32 y; 431 } req; 432 struct { 433 u32 x; 434 u32 y; 435 } resp; 436 } body; 437 }; 438 439 #define BCM2835_MBOX_TAG_GET_OVERSCAN 0x0004000a 440 #define BCM2835_MBOX_TAG_TEST_OVERSCAN 0x0004400a 441 #define BCM2835_MBOX_TAG_SET_OVERSCAN 0x0004800a 442 443 struct bcm2835_mbox_tag_overscan { 444 struct bcm2835_mbox_tag_hdr tag_hdr; 445 union { 446 /* req not used for get */ 447 struct { 448 u32 top; 449 u32 bottom; 450 u32 left; 451 u32 right; 452 } req; 453 struct { 454 u32 top; 455 u32 bottom; 456 u32 left; 457 u32 right; 458 } resp; 459 } body; 460 }; 461 462 #define BCM2835_MBOX_TAG_GET_PALETTE 0x0004000b 463 464 struct bcm2835_mbox_tag_get_palette { 465 struct bcm2835_mbox_tag_hdr tag_hdr; 466 union { 467 struct { 468 } req; 469 struct { 470 u32 data[1024]; 471 } resp; 472 } body; 473 }; 474 475 #define BCM2835_MBOX_TAG_TEST_PALETTE 0x0004400b 476 477 struct bcm2835_mbox_tag_test_palette { 478 struct bcm2835_mbox_tag_hdr tag_hdr; 479 union { 480 struct { 481 u32 offset; 482 u32 num_entries; 483 u32 data[256]; 484 } req; 485 struct { 486 u32 is_invalid; 487 } resp; 488 } body; 489 }; 490 491 #define BCM2835_MBOX_TAG_SET_PALETTE 0x0004800b 492 493 struct bcm2835_mbox_tag_set_palette { 494 struct bcm2835_mbox_tag_hdr tag_hdr; 495 union { 496 struct { 497 u32 offset; 498 u32 num_entries; 499 u32 data[256]; 500 } req; 501 struct { 502 u32 is_invalid; 503 } resp; 504 } body; 505 }; 506 507 /* 508 * Pass a raw u32 message to the VC, and receive a raw u32 back. 509 * 510 * Returns 0 for success, any other value for error. 511 */ 512 int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv); 513 514 /* 515 * Pass a complete property-style buffer to the VC, and wait until it has 516 * been processed. 517 * 518 * This function expects a pointer to the mbox_hdr structure in an attempt 519 * to ensure some degree of type safety. However, some number of tags and 520 * a termination value are expected to immediately follow the header in 521 * memory, as required by the property protocol. 522 * 523 * Returns 0 for success, any other value for error. 524 */ 525 int bcm2835_mbox_call_prop(u32 chan, struct bcm2835_mbox_hdr *buffer); 526 527 #endif 528