1 /*
2  * (C) Copyright 2012,2015 Stephen Warren
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef _BCM2835_MBOX_H
8 #define _BCM2835_MBOX_H
9 
10 #include <linux/compiler.h>
11 
12 /*
13  * The BCM2835 SoC contains (at least) two CPUs; the VideoCore (a/k/a "GPU")
14  * and the ARM CPU. The ARM CPU is often thought of as the main CPU.
15  * However, the VideoCore actually controls the initial SoC boot, and hides
16  * much of the hardware behind a protocol. This protocol is transported
17  * using the SoC's mailbox hardware module.
18  *
19  * The mailbox hardware supports passing 32-bit values back and forth.
20  * Presumably by software convention of the firmware, the bottom 4 bits of the
21  * value are used to indicate a logical channel, and the upper 28 bits are the
22  * actual payload. Various channels exist using these simple raw messages. See
23  * https://github.com/raspberrypi/firmware/wiki/Mailboxes for a list. As an
24  * example, the messages on the power management channel are a bitmask of
25  * devices whose power should be enabled.
26  *
27  * The property mailbox channel passes messages that contain the (16-byte
28  * aligned) ARM physical address of a memory buffer. This buffer is passed to
29  * the VC for processing, is modified in-place by the VC, and the address then
30  * passed back to the ARM CPU as the response mailbox message to indicate
31  * request completion. The buffers have a generic and extensible format; each
32  * buffer contains a standard header, a list of "tags", and a terminating zero
33  * entry. Each tag contains an ID indicating its type, and length fields for
34  * generic parsing. With some limitations, an arbitrary set of tags may be
35  * combined together into a single message buffer. This file defines structs
36  * representing the header and many individual tag layouts and IDs.
37  */
38 
39 /* Raw mailbox HW */
40 
41 #ifdef CONFIG_BCM2836
42 #define BCM2835_MBOX_PHYSADDR	0x3f00b880
43 #else
44 #define BCM2835_MBOX_PHYSADDR	0x2000b880
45 #endif
46 
47 struct bcm2835_mbox_regs {
48 	u32 read;
49 	u32 rsvd0[5];
50 	u32 status;
51 	u32 config;
52 	u32 write;
53 };
54 
55 #define BCM2835_MBOX_STATUS_WR_FULL	0x80000000
56 #define BCM2835_MBOX_STATUS_RD_EMPTY	0x40000000
57 
58 /* Lower 4-bits are channel ID */
59 #define BCM2835_CHAN_MASK		0xf
60 #define BCM2835_MBOX_PACK(chan, data)	(((data) & (~BCM2835_CHAN_MASK)) | \
61 					 (chan & BCM2835_CHAN_MASK))
62 #define BCM2835_MBOX_UNPACK_CHAN(val)	((val) & BCM2835_CHAN_MASK)
63 #define BCM2835_MBOX_UNPACK_DATA(val)	((val) & (~BCM2835_CHAN_MASK))
64 
65 /* Property mailbox buffer structures */
66 
67 #define BCM2835_MBOX_PROP_CHAN		8
68 
69 /* All message buffers must start with this header */
70 struct bcm2835_mbox_hdr {
71 	u32 buf_size;
72 	u32 code;
73 };
74 
75 #define BCM2835_MBOX_REQ_CODE		0
76 #define BCM2835_MBOX_RESP_CODE_SUCCESS	0x80000000
77 
78 #define BCM2835_MBOX_INIT_HDR(_m_) { \
79 		memset((_m_), 0, sizeof(*(_m_))); \
80 		(_m_)->hdr.buf_size = sizeof(*(_m_)); \
81 		(_m_)->hdr.code = 0; \
82 		(_m_)->end_tag = 0; \
83 	}
84 
85 /*
86  * A message buffer contains a list of tags. Each tag must also start with
87  * a standardized header.
88  */
89 struct bcm2835_mbox_tag_hdr {
90 	u32 tag;
91 	u32 val_buf_size;
92 	u32 val_len;
93 };
94 
95 #define BCM2835_MBOX_INIT_TAG(_t_, _id_) { \
96 		(_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \
97 		(_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \
98 		(_t_)->tag_hdr.val_len = sizeof((_t_)->body.req); \
99 	}
100 
101 #define BCM2835_MBOX_INIT_TAG_NO_REQ(_t_, _id_) { \
102 		(_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \
103 		(_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \
104 		(_t_)->tag_hdr.val_len = 0; \
105 	}
106 
107 /* When responding, the VC sets this bit in val_len to indicate a response */
108 #define BCM2835_MBOX_TAG_VAL_LEN_RESPONSE	0x80000000
109 
110 /*
111  * Below we define the ID and struct for many possible tags. This header only
112  * defines individual tag structs, not entire message structs, since in
113  * general an arbitrary set of tags may be combined into a single message.
114  * Clients of the mbox API are expected to define their own overall message
115  * structures by combining the header, a set of tags, and a terminating
116  * entry. For example,
117  *
118  * struct msg {
119  *     struct bcm2835_mbox_hdr hdr;
120  *     struct bcm2835_mbox_tag_get_arm_mem get_arm_mem;
121  *     ... perhaps other tags here ...
122  *     u32 end_tag;
123  * };
124  */
125 
126 #define BCM2835_MBOX_TAG_GET_BOARD_REV	0x00010002
127 
128 #ifdef CONFIG_BCM2836
129 #define BCM2836_BOARD_REV_2_B		0x4
130 #else
131 /*
132  * 0x2..0xf from:
133  * http://raspberryalphaomega.org.uk/2013/02/06/automatic-raspberry-pi-board-revision-detection-model-a-b1-and-b2/
134  * http://www.raspberrypi.org/forums/viewtopic.php?f=63&t=32733
135  * http://git.drogon.net/?p=wiringPi;a=blob_plain;f=wiringPi/wiringPi.c;hb=5edd177112c99416f68ba3e8c6c4db6ed942e796
136  */
137 #define BCM2835_BOARD_REV_B_I2C0_2	0x2
138 #define BCM2835_BOARD_REV_B_I2C0_3	0x3
139 #define BCM2835_BOARD_REV_B_I2C1_4	0x4
140 #define BCM2835_BOARD_REV_B_I2C1_5	0x5
141 #define BCM2835_BOARD_REV_B_I2C1_6	0x6
142 #define BCM2835_BOARD_REV_A_7		0x7
143 #define BCM2835_BOARD_REV_A_8		0x8
144 #define BCM2835_BOARD_REV_A_9		0x9
145 #define BCM2835_BOARD_REV_B_REV2_d	0xd
146 #define BCM2835_BOARD_REV_B_REV2_e	0xe
147 #define BCM2835_BOARD_REV_B_REV2_f	0xf
148 #define BCM2835_BOARD_REV_B_PLUS	0x10
149 #define BCM2835_BOARD_REV_CM		0x11
150 #define BCM2835_BOARD_REV_A_PLUS	0x12
151 #define BCM2835_BOARD_REV_B_PLUS_13	0x13
152 #define BCM2835_BOARD_REV_CM_14		0x14
153 #endif
154 
155 struct bcm2835_mbox_tag_get_board_rev {
156 	struct bcm2835_mbox_tag_hdr tag_hdr;
157 	union {
158 		struct {
159 		} req;
160 		struct {
161 			u32 rev;
162 		} resp;
163 	} body;
164 };
165 
166 #define BCM2835_MBOX_TAG_GET_MAC_ADDRESS	0x00010003
167 
168 struct bcm2835_mbox_tag_get_mac_address {
169 	struct bcm2835_mbox_tag_hdr tag_hdr;
170 	union {
171 		struct {
172 		} req;
173 		struct {
174 			u8 mac[6];
175 			u8 pad[2];
176 		} resp;
177 	} body;
178 };
179 
180 #define BCM2835_MBOX_TAG_GET_ARM_MEMORY		0x00010005
181 
182 struct bcm2835_mbox_tag_get_arm_mem {
183 	struct bcm2835_mbox_tag_hdr tag_hdr;
184 	union {
185 		struct {
186 		} req;
187 		struct {
188 			u32 mem_base;
189 			u32 mem_size;
190 		} resp;
191 	} body;
192 };
193 
194 #define BCM2835_MBOX_POWER_DEVID_SDHCI		0
195 #define BCM2835_MBOX_POWER_DEVID_UART0		1
196 #define BCM2835_MBOX_POWER_DEVID_UART1		2
197 #define BCM2835_MBOX_POWER_DEVID_USB_HCD	3
198 #define BCM2835_MBOX_POWER_DEVID_I2C0		4
199 #define BCM2835_MBOX_POWER_DEVID_I2C1		5
200 #define BCM2835_MBOX_POWER_DEVID_I2C2		6
201 #define BCM2835_MBOX_POWER_DEVID_SPI		7
202 #define BCM2835_MBOX_POWER_DEVID_CCP2TX		8
203 
204 #define BCM2835_MBOX_POWER_STATE_RESP_ON	(1 << 0)
205 /* Device doesn't exist */
206 #define BCM2835_MBOX_POWER_STATE_RESP_NODEV	(1 << 1)
207 
208 #define BCM2835_MBOX_TAG_GET_POWER_STATE	0x00020001
209 
210 struct bcm2835_mbox_tag_get_power_state {
211 	struct bcm2835_mbox_tag_hdr tag_hdr;
212 	union {
213 		struct {
214 			u32 device_id;
215 		} req;
216 		struct {
217 			u32 device_id;
218 			u32 state;
219 		} resp;
220 	} body;
221 };
222 
223 #define BCM2835_MBOX_TAG_SET_POWER_STATE	0x00028001
224 
225 #define BCM2835_MBOX_SET_POWER_STATE_REQ_ON	(1 << 0)
226 #define BCM2835_MBOX_SET_POWER_STATE_REQ_WAIT	(1 << 1)
227 
228 struct bcm2835_mbox_tag_set_power_state {
229 	struct bcm2835_mbox_tag_hdr tag_hdr;
230 	union {
231 		struct {
232 			u32 device_id;
233 			u32 state;
234 		} req;
235 		struct {
236 			u32 device_id;
237 			u32 state;
238 		} resp;
239 	} body;
240 };
241 
242 #define BCM2835_MBOX_TAG_GET_CLOCK_RATE	0x00030002
243 
244 #define BCM2835_MBOX_CLOCK_ID_EMMC	1
245 #define BCM2835_MBOX_CLOCK_ID_UART	2
246 #define BCM2835_MBOX_CLOCK_ID_ARM	3
247 #define BCM2835_MBOX_CLOCK_ID_CORE	4
248 #define BCM2835_MBOX_CLOCK_ID_V3D	5
249 #define BCM2835_MBOX_CLOCK_ID_H264	6
250 #define BCM2835_MBOX_CLOCK_ID_ISP	7
251 #define BCM2835_MBOX_CLOCK_ID_SDRAM	8
252 #define BCM2835_MBOX_CLOCK_ID_PIXEL	9
253 #define BCM2835_MBOX_CLOCK_ID_PWM	10
254 
255 struct bcm2835_mbox_tag_get_clock_rate {
256 	struct bcm2835_mbox_tag_hdr tag_hdr;
257 	union {
258 		struct {
259 			u32 clock_id;
260 		} req;
261 		struct {
262 			u32 clock_id;
263 			u32 rate_hz;
264 		} resp;
265 	} body;
266 };
267 
268 #define BCM2835_MBOX_TAG_ALLOCATE_BUFFER	0x00040001
269 
270 struct bcm2835_mbox_tag_allocate_buffer {
271 	struct bcm2835_mbox_tag_hdr tag_hdr;
272 	union {
273 		struct {
274 			u32 alignment;
275 		} req;
276 		struct {
277 			u32 fb_address;
278 			u32 fb_size;
279 		} resp;
280 	} body;
281 };
282 
283 #define BCM2835_MBOX_TAG_RELEASE_BUFFER		0x00048001
284 
285 struct bcm2835_mbox_tag_release_buffer {
286 	struct bcm2835_mbox_tag_hdr tag_hdr;
287 	union {
288 		struct {
289 		} req;
290 		struct {
291 		} resp;
292 	} body;
293 };
294 
295 #define BCM2835_MBOX_TAG_BLANK_SCREEN		0x00040002
296 
297 struct bcm2835_mbox_tag_blank_screen {
298 	struct bcm2835_mbox_tag_hdr tag_hdr;
299 	union {
300 		struct {
301 			/* bit 0 means on, other bots reserved */
302 			u32 state;
303 		} req;
304 		struct {
305 			u32 state;
306 		} resp;
307 	} body;
308 };
309 
310 /* Physical means output signal */
311 #define BCM2835_MBOX_TAG_GET_PHYSICAL_W_H	0x00040003
312 #define BCM2835_MBOX_TAG_TEST_PHYSICAL_W_H	0x00044003
313 #define BCM2835_MBOX_TAG_SET_PHYSICAL_W_H	0x00048003
314 
315 struct bcm2835_mbox_tag_physical_w_h {
316 	struct bcm2835_mbox_tag_hdr tag_hdr;
317 	union {
318 		/* req not used for get */
319 		struct {
320 			u32 width;
321 			u32 height;
322 		} req;
323 		struct {
324 			u32 width;
325 			u32 height;
326 		} resp;
327 	} body;
328 };
329 
330 /* Virtual means display buffer */
331 #define BCM2835_MBOX_TAG_GET_VIRTUAL_W_H	0x00040004
332 #define BCM2835_MBOX_TAG_TEST_VIRTUAL_W_H	0x00044004
333 #define BCM2835_MBOX_TAG_SET_VIRTUAL_W_H	0x00048004
334 
335 struct bcm2835_mbox_tag_virtual_w_h {
336 	struct bcm2835_mbox_tag_hdr tag_hdr;
337 	union {
338 		/* req not used for get */
339 		struct {
340 			u32 width;
341 			u32 height;
342 		} req;
343 		struct {
344 			u32 width;
345 			u32 height;
346 		} resp;
347 	} body;
348 };
349 
350 #define BCM2835_MBOX_TAG_GET_DEPTH		0x00040005
351 #define BCM2835_MBOX_TAG_TEST_DEPTH		0x00044005
352 #define BCM2835_MBOX_TAG_SET_DEPTH		0x00048005
353 
354 struct bcm2835_mbox_tag_depth {
355 	struct bcm2835_mbox_tag_hdr tag_hdr;
356 	union {
357 		/* req not used for get */
358 		struct {
359 			u32 bpp;
360 		} req;
361 		struct {
362 			u32 bpp;
363 		} resp;
364 	} body;
365 };
366 
367 #define BCM2835_MBOX_TAG_GET_PIXEL_ORDER	0x00040006
368 #define BCM2835_MBOX_TAG_TEST_PIXEL_ORDER	0x00044005
369 #define BCM2835_MBOX_TAG_SET_PIXEL_ORDER	0x00048006
370 
371 #define BCM2835_MBOX_PIXEL_ORDER_BGR		0
372 #define BCM2835_MBOX_PIXEL_ORDER_RGB		1
373 
374 struct bcm2835_mbox_tag_pixel_order {
375 	struct bcm2835_mbox_tag_hdr tag_hdr;
376 	union {
377 		/* req not used for get */
378 		struct {
379 			u32 order;
380 		} req;
381 		struct {
382 			u32 order;
383 		} resp;
384 	} body;
385 };
386 
387 #define BCM2835_MBOX_TAG_GET_ALPHA_MODE		0x00040007
388 #define BCM2835_MBOX_TAG_TEST_ALPHA_MODE	0x00044007
389 #define BCM2835_MBOX_TAG_SET_ALPHA_MODE		0x00048007
390 
391 #define BCM2835_MBOX_ALPHA_MODE_0_OPAQUE	0
392 #define BCM2835_MBOX_ALPHA_MODE_0_TRANSPARENT	1
393 #define BCM2835_MBOX_ALPHA_MODE_IGNORED		2
394 
395 struct bcm2835_mbox_tag_alpha_mode {
396 	struct bcm2835_mbox_tag_hdr tag_hdr;
397 	union {
398 		/* req not used for get */
399 		struct {
400 			u32 alpha;
401 		} req;
402 		struct {
403 			u32 alpha;
404 		} resp;
405 	} body;
406 };
407 
408 #define BCM2835_MBOX_TAG_GET_PITCH		0x00040008
409 
410 struct bcm2835_mbox_tag_pitch {
411 	struct bcm2835_mbox_tag_hdr tag_hdr;
412 	union {
413 		struct {
414 		} req;
415 		struct {
416 			u32 pitch;
417 		} resp;
418 	} body;
419 };
420 
421 /* Offset of display window within buffer */
422 #define BCM2835_MBOX_TAG_GET_VIRTUAL_OFFSET	0x00040009
423 #define BCM2835_MBOX_TAG_TEST_VIRTUAL_OFFSET	0x00044009
424 #define BCM2835_MBOX_TAG_SET_VIRTUAL_OFFSET	0x00048009
425 
426 struct bcm2835_mbox_tag_virtual_offset {
427 	struct bcm2835_mbox_tag_hdr tag_hdr;
428 	union {
429 		/* req not used for get */
430 		struct {
431 			u32 x;
432 			u32 y;
433 		} req;
434 		struct {
435 			u32 x;
436 			u32 y;
437 		} resp;
438 	} body;
439 };
440 
441 #define BCM2835_MBOX_TAG_GET_OVERSCAN		0x0004000a
442 #define BCM2835_MBOX_TAG_TEST_OVERSCAN		0x0004400a
443 #define BCM2835_MBOX_TAG_SET_OVERSCAN		0x0004800a
444 
445 struct bcm2835_mbox_tag_overscan {
446 	struct bcm2835_mbox_tag_hdr tag_hdr;
447 	union {
448 		/* req not used for get */
449 		struct {
450 			u32 top;
451 			u32 bottom;
452 			u32 left;
453 			u32 right;
454 		} req;
455 		struct {
456 			u32 top;
457 			u32 bottom;
458 			u32 left;
459 			u32 right;
460 		} resp;
461 	} body;
462 };
463 
464 #define BCM2835_MBOX_TAG_GET_PALETTE		0x0004000b
465 
466 struct bcm2835_mbox_tag_get_palette {
467 	struct bcm2835_mbox_tag_hdr tag_hdr;
468 	union {
469 		struct {
470 		} req;
471 		struct {
472 			u32 data[1024];
473 		} resp;
474 	} body;
475 };
476 
477 #define BCM2835_MBOX_TAG_TEST_PALETTE		0x0004400b
478 
479 struct bcm2835_mbox_tag_test_palette {
480 	struct bcm2835_mbox_tag_hdr tag_hdr;
481 	union {
482 		struct {
483 			u32 offset;
484 			u32 num_entries;
485 			u32 data[256];
486 		} req;
487 		struct {
488 			u32 is_invalid;
489 		} resp;
490 	} body;
491 };
492 
493 #define BCM2835_MBOX_TAG_SET_PALETTE		0x0004800b
494 
495 struct bcm2835_mbox_tag_set_palette {
496 	struct bcm2835_mbox_tag_hdr tag_hdr;
497 	union {
498 		struct {
499 			u32 offset;
500 			u32 num_entries;
501 			u32 data[256];
502 		} req;
503 		struct {
504 			u32 is_invalid;
505 		} resp;
506 	} body;
507 };
508 
509 /*
510  * Pass a raw u32 message to the VC, and receive a raw u32 back.
511  *
512  * Returns 0 for success, any other value for error.
513  */
514 int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv);
515 
516 /*
517  * Pass a complete property-style buffer to the VC, and wait until it has
518  * been processed.
519  *
520  * This function expects a pointer to the mbox_hdr structure in an attempt
521  * to ensure some degree of type safety. However, some number of tags and
522  * a termination value are expected to immediately follow the header in
523  * memory, as required by the property protocol.
524  *
525  * Each struct bcm2835_mbox_hdr passed must be allocated with
526  * ALLOC_CACHE_ALIGN_BUFFER(x, y, z) to ensure proper cache flush/invalidate.
527  *
528  * Returns 0 for success, any other value for error.
529  */
530 int bcm2835_mbox_call_prop(u32 chan, struct bcm2835_mbox_hdr *buffer);
531 
532 #endif
533