1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2d6c418e4SMasahiro Yamada /* 3d6c418e4SMasahiro Yamada * (C) Copyright 2012,2015 Stephen Warren 4d6c418e4SMasahiro Yamada */ 5d6c418e4SMasahiro Yamada 6d6c418e4SMasahiro Yamada #ifndef _BCM2835_MBOX_H 7d6c418e4SMasahiro Yamada #define _BCM2835_MBOX_H 8d6c418e4SMasahiro Yamada 9d6c418e4SMasahiro Yamada #include <linux/compiler.h> 10d6c418e4SMasahiro Yamada 11d6c418e4SMasahiro Yamada /* 12d6c418e4SMasahiro Yamada * The BCM2835 SoC contains (at least) two CPUs; the VideoCore (a/k/a "GPU") 13d6c418e4SMasahiro Yamada * and the ARM CPU. The ARM CPU is often thought of as the main CPU. 14d6c418e4SMasahiro Yamada * However, the VideoCore actually controls the initial SoC boot, and hides 15d6c418e4SMasahiro Yamada * much of the hardware behind a protocol. This protocol is transported 16d6c418e4SMasahiro Yamada * using the SoC's mailbox hardware module. 17d6c418e4SMasahiro Yamada * 18d6c418e4SMasahiro Yamada * The mailbox hardware supports passing 32-bit values back and forth. 19d6c418e4SMasahiro Yamada * Presumably by software convention of the firmware, the bottom 4 bits of the 20d6c418e4SMasahiro Yamada * value are used to indicate a logical channel, and the upper 28 bits are the 21d6c418e4SMasahiro Yamada * actual payload. Various channels exist using these simple raw messages. See 22d6c418e4SMasahiro Yamada * https://github.com/raspberrypi/firmware/wiki/Mailboxes for a list. As an 23d6c418e4SMasahiro Yamada * example, the messages on the power management channel are a bitmask of 24d6c418e4SMasahiro Yamada * devices whose power should be enabled. 25d6c418e4SMasahiro Yamada * 26d6c418e4SMasahiro Yamada * The property mailbox channel passes messages that contain the (16-byte 27d6c418e4SMasahiro Yamada * aligned) ARM physical address of a memory buffer. This buffer is passed to 28d6c418e4SMasahiro Yamada * the VC for processing, is modified in-place by the VC, and the address then 29d6c418e4SMasahiro Yamada * passed back to the ARM CPU as the response mailbox message to indicate 30d6c418e4SMasahiro Yamada * request completion. The buffers have a generic and extensible format; each 31d6c418e4SMasahiro Yamada * buffer contains a standard header, a list of "tags", and a terminating zero 32d6c418e4SMasahiro Yamada * entry. Each tag contains an ID indicating its type, and length fields for 33d6c418e4SMasahiro Yamada * generic parsing. With some limitations, an arbitrary set of tags may be 34d6c418e4SMasahiro Yamada * combined together into a single message buffer. This file defines structs 35d6c418e4SMasahiro Yamada * representing the header and many individual tag layouts and IDs. 36d6c418e4SMasahiro Yamada */ 37d6c418e4SMasahiro Yamada 38d6c418e4SMasahiro Yamada /* Raw mailbox HW */ 39d6c418e4SMasahiro Yamada 40ed7481c7SStephen Warren #ifndef CONFIG_BCM2835 41d6c418e4SMasahiro Yamada #define BCM2835_MBOX_PHYSADDR 0x3f00b880 42d6c418e4SMasahiro Yamada #else 43d6c418e4SMasahiro Yamada #define BCM2835_MBOX_PHYSADDR 0x2000b880 44d6c418e4SMasahiro Yamada #endif 45d6c418e4SMasahiro Yamada 46d6c418e4SMasahiro Yamada struct bcm2835_mbox_regs { 47d6c418e4SMasahiro Yamada u32 read; 48d6c418e4SMasahiro Yamada u32 rsvd0[5]; 49d6c418e4SMasahiro Yamada u32 status; 50d6c418e4SMasahiro Yamada u32 config; 51d6c418e4SMasahiro Yamada u32 write; 52d6c418e4SMasahiro Yamada }; 53d6c418e4SMasahiro Yamada 54d6c418e4SMasahiro Yamada #define BCM2835_MBOX_STATUS_WR_FULL 0x80000000 55d6c418e4SMasahiro Yamada #define BCM2835_MBOX_STATUS_RD_EMPTY 0x40000000 56d6c418e4SMasahiro Yamada 57d6c418e4SMasahiro Yamada /* Lower 4-bits are channel ID */ 58d6c418e4SMasahiro Yamada #define BCM2835_CHAN_MASK 0xf 59d6c418e4SMasahiro Yamada #define BCM2835_MBOX_PACK(chan, data) (((data) & (~BCM2835_CHAN_MASK)) | \ 60d6c418e4SMasahiro Yamada (chan & BCM2835_CHAN_MASK)) 61d6c418e4SMasahiro Yamada #define BCM2835_MBOX_UNPACK_CHAN(val) ((val) & BCM2835_CHAN_MASK) 62d6c418e4SMasahiro Yamada #define BCM2835_MBOX_UNPACK_DATA(val) ((val) & (~BCM2835_CHAN_MASK)) 63d6c418e4SMasahiro Yamada 64d6c418e4SMasahiro Yamada /* Property mailbox buffer structures */ 65d6c418e4SMasahiro Yamada 66d6c418e4SMasahiro Yamada #define BCM2835_MBOX_PROP_CHAN 8 67d6c418e4SMasahiro Yamada 68d6c418e4SMasahiro Yamada /* All message buffers must start with this header */ 69d6c418e4SMasahiro Yamada struct bcm2835_mbox_hdr { 70d6c418e4SMasahiro Yamada u32 buf_size; 71d6c418e4SMasahiro Yamada u32 code; 72d6c418e4SMasahiro Yamada }; 73d6c418e4SMasahiro Yamada 74d6c418e4SMasahiro Yamada #define BCM2835_MBOX_REQ_CODE 0 75d6c418e4SMasahiro Yamada #define BCM2835_MBOX_RESP_CODE_SUCCESS 0x80000000 76d6c418e4SMasahiro Yamada 77d6c418e4SMasahiro Yamada #define BCM2835_MBOX_INIT_HDR(_m_) { \ 78d6c418e4SMasahiro Yamada memset((_m_), 0, sizeof(*(_m_))); \ 79d6c418e4SMasahiro Yamada (_m_)->hdr.buf_size = sizeof(*(_m_)); \ 80d6c418e4SMasahiro Yamada (_m_)->hdr.code = 0; \ 81d6c418e4SMasahiro Yamada (_m_)->end_tag = 0; \ 82d6c418e4SMasahiro Yamada } 83d6c418e4SMasahiro Yamada 84d6c418e4SMasahiro Yamada /* 85d6c418e4SMasahiro Yamada * A message buffer contains a list of tags. Each tag must also start with 86d6c418e4SMasahiro Yamada * a standardized header. 87d6c418e4SMasahiro Yamada */ 88d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_hdr { 89d6c418e4SMasahiro Yamada u32 tag; 90d6c418e4SMasahiro Yamada u32 val_buf_size; 91d6c418e4SMasahiro Yamada u32 val_len; 92d6c418e4SMasahiro Yamada }; 93d6c418e4SMasahiro Yamada 94d6c418e4SMasahiro Yamada #define BCM2835_MBOX_INIT_TAG(_t_, _id_) { \ 95d6c418e4SMasahiro Yamada (_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \ 96d6c418e4SMasahiro Yamada (_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \ 97d6c418e4SMasahiro Yamada (_t_)->tag_hdr.val_len = sizeof((_t_)->body.req); \ 98d6c418e4SMasahiro Yamada } 99d6c418e4SMasahiro Yamada 100d6c418e4SMasahiro Yamada #define BCM2835_MBOX_INIT_TAG_NO_REQ(_t_, _id_) { \ 101d6c418e4SMasahiro Yamada (_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \ 102d6c418e4SMasahiro Yamada (_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \ 103d6c418e4SMasahiro Yamada (_t_)->tag_hdr.val_len = 0; \ 104d6c418e4SMasahiro Yamada } 105d6c418e4SMasahiro Yamada 106d6c418e4SMasahiro Yamada /* When responding, the VC sets this bit in val_len to indicate a response */ 107d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_VAL_LEN_RESPONSE 0x80000000 108d6c418e4SMasahiro Yamada 109d6c418e4SMasahiro Yamada /* 110d6c418e4SMasahiro Yamada * Below we define the ID and struct for many possible tags. This header only 111d6c418e4SMasahiro Yamada * defines individual tag structs, not entire message structs, since in 112d6c418e4SMasahiro Yamada * general an arbitrary set of tags may be combined into a single message. 113d6c418e4SMasahiro Yamada * Clients of the mbox API are expected to define their own overall message 114d6c418e4SMasahiro Yamada * structures by combining the header, a set of tags, and a terminating 115d6c418e4SMasahiro Yamada * entry. For example, 116d6c418e4SMasahiro Yamada * 117d6c418e4SMasahiro Yamada * struct msg { 118d6c418e4SMasahiro Yamada * struct bcm2835_mbox_hdr hdr; 119d6c418e4SMasahiro Yamada * struct bcm2835_mbox_tag_get_arm_mem get_arm_mem; 120d6c418e4SMasahiro Yamada * ... perhaps other tags here ... 121d6c418e4SMasahiro Yamada * u32 end_tag; 122d6c418e4SMasahiro Yamada * }; 123d6c418e4SMasahiro Yamada */ 124d6c418e4SMasahiro Yamada 125d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_GET_BOARD_REV 0x00010002 126d6c418e4SMasahiro Yamada 127d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_get_board_rev { 128d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_hdr tag_hdr; 129d6c418e4SMasahiro Yamada union { 130d6c418e4SMasahiro Yamada struct { 131d6c418e4SMasahiro Yamada } req; 132d6c418e4SMasahiro Yamada struct { 133d6c418e4SMasahiro Yamada u32 rev; 134d6c418e4SMasahiro Yamada } resp; 135d6c418e4SMasahiro Yamada } body; 136d6c418e4SMasahiro Yamada }; 137d6c418e4SMasahiro Yamada 138d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_GET_MAC_ADDRESS 0x00010003 139d6c418e4SMasahiro Yamada 140d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_get_mac_address { 141d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_hdr tag_hdr; 142d6c418e4SMasahiro Yamada union { 143d6c418e4SMasahiro Yamada struct { 144d6c418e4SMasahiro Yamada } req; 145d6c418e4SMasahiro Yamada struct { 146d6c418e4SMasahiro Yamada u8 mac[6]; 147d6c418e4SMasahiro Yamada u8 pad[2]; 148d6c418e4SMasahiro Yamada } resp; 149d6c418e4SMasahiro Yamada } body; 150d6c418e4SMasahiro Yamada }; 151d6c418e4SMasahiro Yamada 152757cd149SLubomir Rintel #define BCM2835_MBOX_TAG_GET_BOARD_SERIAL 0x00010004 153757cd149SLubomir Rintel 154757cd149SLubomir Rintel struct bcm2835_mbox_tag_get_board_serial { 155757cd149SLubomir Rintel struct bcm2835_mbox_tag_hdr tag_hdr; 156757cd149SLubomir Rintel union { 157757cd149SLubomir Rintel struct __packed { 158757cd149SLubomir Rintel u64 serial; 159757cd149SLubomir Rintel } resp; 160757cd149SLubomir Rintel } body; 161757cd149SLubomir Rintel }; 162757cd149SLubomir Rintel 163d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_GET_ARM_MEMORY 0x00010005 164d6c418e4SMasahiro Yamada 165d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_get_arm_mem { 166d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_hdr tag_hdr; 167d6c418e4SMasahiro Yamada union { 168d6c418e4SMasahiro Yamada struct { 169d6c418e4SMasahiro Yamada } req; 170d6c418e4SMasahiro Yamada struct { 171d6c418e4SMasahiro Yamada u32 mem_base; 172d6c418e4SMasahiro Yamada u32 mem_size; 173d6c418e4SMasahiro Yamada } resp; 174d6c418e4SMasahiro Yamada } body; 175d6c418e4SMasahiro Yamada }; 176d6c418e4SMasahiro Yamada 177d6c418e4SMasahiro Yamada #define BCM2835_MBOX_POWER_DEVID_SDHCI 0 178d6c418e4SMasahiro Yamada #define BCM2835_MBOX_POWER_DEVID_UART0 1 179d6c418e4SMasahiro Yamada #define BCM2835_MBOX_POWER_DEVID_UART1 2 180d6c418e4SMasahiro Yamada #define BCM2835_MBOX_POWER_DEVID_USB_HCD 3 181d6c418e4SMasahiro Yamada #define BCM2835_MBOX_POWER_DEVID_I2C0 4 182d6c418e4SMasahiro Yamada #define BCM2835_MBOX_POWER_DEVID_I2C1 5 183d6c418e4SMasahiro Yamada #define BCM2835_MBOX_POWER_DEVID_I2C2 6 184d6c418e4SMasahiro Yamada #define BCM2835_MBOX_POWER_DEVID_SPI 7 185d6c418e4SMasahiro Yamada #define BCM2835_MBOX_POWER_DEVID_CCP2TX 8 186d6c418e4SMasahiro Yamada 187d6c418e4SMasahiro Yamada #define BCM2835_MBOX_POWER_STATE_RESP_ON (1 << 0) 188d6c418e4SMasahiro Yamada /* Device doesn't exist */ 189d6c418e4SMasahiro Yamada #define BCM2835_MBOX_POWER_STATE_RESP_NODEV (1 << 1) 190d6c418e4SMasahiro Yamada 191d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_GET_POWER_STATE 0x00020001 192d6c418e4SMasahiro Yamada 193d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_get_power_state { 194d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_hdr tag_hdr; 195d6c418e4SMasahiro Yamada union { 196d6c418e4SMasahiro Yamada struct { 197d6c418e4SMasahiro Yamada u32 device_id; 198d6c418e4SMasahiro Yamada } req; 199d6c418e4SMasahiro Yamada struct { 200d6c418e4SMasahiro Yamada u32 device_id; 201d6c418e4SMasahiro Yamada u32 state; 202d6c418e4SMasahiro Yamada } resp; 203d6c418e4SMasahiro Yamada } body; 204d6c418e4SMasahiro Yamada }; 205d6c418e4SMasahiro Yamada 206d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_SET_POWER_STATE 0x00028001 207d6c418e4SMasahiro Yamada 208d6c418e4SMasahiro Yamada #define BCM2835_MBOX_SET_POWER_STATE_REQ_ON (1 << 0) 209d6c418e4SMasahiro Yamada #define BCM2835_MBOX_SET_POWER_STATE_REQ_WAIT (1 << 1) 210d6c418e4SMasahiro Yamada 211d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_set_power_state { 212d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_hdr tag_hdr; 213d6c418e4SMasahiro Yamada union { 214d6c418e4SMasahiro Yamada struct { 215d6c418e4SMasahiro Yamada u32 device_id; 216d6c418e4SMasahiro Yamada u32 state; 217d6c418e4SMasahiro Yamada } req; 218d6c418e4SMasahiro Yamada struct { 219d6c418e4SMasahiro Yamada u32 device_id; 220d6c418e4SMasahiro Yamada u32 state; 221d6c418e4SMasahiro Yamada } resp; 222d6c418e4SMasahiro Yamada } body; 223d6c418e4SMasahiro Yamada }; 224d6c418e4SMasahiro Yamada 225d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_GET_CLOCK_RATE 0x00030002 226d6c418e4SMasahiro Yamada 227d6c418e4SMasahiro Yamada #define BCM2835_MBOX_CLOCK_ID_EMMC 1 228d6c418e4SMasahiro Yamada #define BCM2835_MBOX_CLOCK_ID_UART 2 229d6c418e4SMasahiro Yamada #define BCM2835_MBOX_CLOCK_ID_ARM 3 230d6c418e4SMasahiro Yamada #define BCM2835_MBOX_CLOCK_ID_CORE 4 231d6c418e4SMasahiro Yamada #define BCM2835_MBOX_CLOCK_ID_V3D 5 232d6c418e4SMasahiro Yamada #define BCM2835_MBOX_CLOCK_ID_H264 6 233d6c418e4SMasahiro Yamada #define BCM2835_MBOX_CLOCK_ID_ISP 7 234d6c418e4SMasahiro Yamada #define BCM2835_MBOX_CLOCK_ID_SDRAM 8 235d6c418e4SMasahiro Yamada #define BCM2835_MBOX_CLOCK_ID_PIXEL 9 236d6c418e4SMasahiro Yamada #define BCM2835_MBOX_CLOCK_ID_PWM 10 237d6c418e4SMasahiro Yamada 238d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_get_clock_rate { 239d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_hdr tag_hdr; 240d6c418e4SMasahiro Yamada union { 241d6c418e4SMasahiro Yamada struct { 242d6c418e4SMasahiro Yamada u32 clock_id; 243d6c418e4SMasahiro Yamada } req; 244d6c418e4SMasahiro Yamada struct { 245d6c418e4SMasahiro Yamada u32 clock_id; 246d6c418e4SMasahiro Yamada u32 rate_hz; 247d6c418e4SMasahiro Yamada } resp; 248d6c418e4SMasahiro Yamada } body; 249d6c418e4SMasahiro Yamada }; 250d6c418e4SMasahiro Yamada 251d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_ALLOCATE_BUFFER 0x00040001 252d6c418e4SMasahiro Yamada 253d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_allocate_buffer { 254d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_hdr tag_hdr; 255d6c418e4SMasahiro Yamada union { 256d6c418e4SMasahiro Yamada struct { 257d6c418e4SMasahiro Yamada u32 alignment; 258d6c418e4SMasahiro Yamada } req; 259d6c418e4SMasahiro Yamada struct { 260d6c418e4SMasahiro Yamada u32 fb_address; 261d6c418e4SMasahiro Yamada u32 fb_size; 262d6c418e4SMasahiro Yamada } resp; 263d6c418e4SMasahiro Yamada } body; 264d6c418e4SMasahiro Yamada }; 265d6c418e4SMasahiro Yamada 266d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_RELEASE_BUFFER 0x00048001 267d6c418e4SMasahiro Yamada 268d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_release_buffer { 269d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_hdr tag_hdr; 270d6c418e4SMasahiro Yamada union { 271d6c418e4SMasahiro Yamada struct { 272d6c418e4SMasahiro Yamada } req; 273d6c418e4SMasahiro Yamada struct { 274d6c418e4SMasahiro Yamada } resp; 275d6c418e4SMasahiro Yamada } body; 276d6c418e4SMasahiro Yamada }; 277d6c418e4SMasahiro Yamada 278d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_BLANK_SCREEN 0x00040002 279d6c418e4SMasahiro Yamada 280d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_blank_screen { 281d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_hdr tag_hdr; 282d6c418e4SMasahiro Yamada union { 283d6c418e4SMasahiro Yamada struct { 284d6c418e4SMasahiro Yamada /* bit 0 means on, other bots reserved */ 285d6c418e4SMasahiro Yamada u32 state; 286d6c418e4SMasahiro Yamada } req; 287d6c418e4SMasahiro Yamada struct { 288d6c418e4SMasahiro Yamada u32 state; 289d6c418e4SMasahiro Yamada } resp; 290d6c418e4SMasahiro Yamada } body; 291d6c418e4SMasahiro Yamada }; 292d6c418e4SMasahiro Yamada 293d6c418e4SMasahiro Yamada /* Physical means output signal */ 294d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_GET_PHYSICAL_W_H 0x00040003 295d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_TEST_PHYSICAL_W_H 0x00044003 296d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_SET_PHYSICAL_W_H 0x00048003 297d6c418e4SMasahiro Yamada 298d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_physical_w_h { 299d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_hdr tag_hdr; 300d6c418e4SMasahiro Yamada union { 301d6c418e4SMasahiro Yamada /* req not used for get */ 302d6c418e4SMasahiro Yamada struct { 303d6c418e4SMasahiro Yamada u32 width; 304d6c418e4SMasahiro Yamada u32 height; 305d6c418e4SMasahiro Yamada } req; 306d6c418e4SMasahiro Yamada struct { 307d6c418e4SMasahiro Yamada u32 width; 308d6c418e4SMasahiro Yamada u32 height; 309d6c418e4SMasahiro Yamada } resp; 310d6c418e4SMasahiro Yamada } body; 311d6c418e4SMasahiro Yamada }; 312d6c418e4SMasahiro Yamada 313d6c418e4SMasahiro Yamada /* Virtual means display buffer */ 314d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_GET_VIRTUAL_W_H 0x00040004 315d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_TEST_VIRTUAL_W_H 0x00044004 316d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_SET_VIRTUAL_W_H 0x00048004 317d6c418e4SMasahiro Yamada 318d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_virtual_w_h { 319d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_hdr tag_hdr; 320d6c418e4SMasahiro Yamada union { 321d6c418e4SMasahiro Yamada /* req not used for get */ 322d6c418e4SMasahiro Yamada struct { 323d6c418e4SMasahiro Yamada u32 width; 324d6c418e4SMasahiro Yamada u32 height; 325d6c418e4SMasahiro Yamada } req; 326d6c418e4SMasahiro Yamada struct { 327d6c418e4SMasahiro Yamada u32 width; 328d6c418e4SMasahiro Yamada u32 height; 329d6c418e4SMasahiro Yamada } resp; 330d6c418e4SMasahiro Yamada } body; 331d6c418e4SMasahiro Yamada }; 332d6c418e4SMasahiro Yamada 333d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_GET_DEPTH 0x00040005 334d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_TEST_DEPTH 0x00044005 335d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_SET_DEPTH 0x00048005 336d6c418e4SMasahiro Yamada 337d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_depth { 338d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_hdr tag_hdr; 339d6c418e4SMasahiro Yamada union { 340d6c418e4SMasahiro Yamada /* req not used for get */ 341d6c418e4SMasahiro Yamada struct { 342d6c418e4SMasahiro Yamada u32 bpp; 343d6c418e4SMasahiro Yamada } req; 344d6c418e4SMasahiro Yamada struct { 345d6c418e4SMasahiro Yamada u32 bpp; 346d6c418e4SMasahiro Yamada } resp; 347d6c418e4SMasahiro Yamada } body; 348d6c418e4SMasahiro Yamada }; 349d6c418e4SMasahiro Yamada 350d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_GET_PIXEL_ORDER 0x00040006 351d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_TEST_PIXEL_ORDER 0x00044005 352d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_SET_PIXEL_ORDER 0x00048006 353d6c418e4SMasahiro Yamada 354d6c418e4SMasahiro Yamada #define BCM2835_MBOX_PIXEL_ORDER_BGR 0 355d6c418e4SMasahiro Yamada #define BCM2835_MBOX_PIXEL_ORDER_RGB 1 356d6c418e4SMasahiro Yamada 357d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_pixel_order { 358d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_hdr tag_hdr; 359d6c418e4SMasahiro Yamada union { 360d6c418e4SMasahiro Yamada /* req not used for get */ 361d6c418e4SMasahiro Yamada struct { 362d6c418e4SMasahiro Yamada u32 order; 363d6c418e4SMasahiro Yamada } req; 364d6c418e4SMasahiro Yamada struct { 365d6c418e4SMasahiro Yamada u32 order; 366d6c418e4SMasahiro Yamada } resp; 367d6c418e4SMasahiro Yamada } body; 368d6c418e4SMasahiro Yamada }; 369d6c418e4SMasahiro Yamada 370d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_GET_ALPHA_MODE 0x00040007 371d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_TEST_ALPHA_MODE 0x00044007 372d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_SET_ALPHA_MODE 0x00048007 373d6c418e4SMasahiro Yamada 374d6c418e4SMasahiro Yamada #define BCM2835_MBOX_ALPHA_MODE_0_OPAQUE 0 375d6c418e4SMasahiro Yamada #define BCM2835_MBOX_ALPHA_MODE_0_TRANSPARENT 1 376d6c418e4SMasahiro Yamada #define BCM2835_MBOX_ALPHA_MODE_IGNORED 2 377d6c418e4SMasahiro Yamada 378d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_alpha_mode { 379d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_hdr tag_hdr; 380d6c418e4SMasahiro Yamada union { 381d6c418e4SMasahiro Yamada /* req not used for get */ 382d6c418e4SMasahiro Yamada struct { 383d6c418e4SMasahiro Yamada u32 alpha; 384d6c418e4SMasahiro Yamada } req; 385d6c418e4SMasahiro Yamada struct { 386d6c418e4SMasahiro Yamada u32 alpha; 387d6c418e4SMasahiro Yamada } resp; 388d6c418e4SMasahiro Yamada } body; 389d6c418e4SMasahiro Yamada }; 390d6c418e4SMasahiro Yamada 391d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_GET_PITCH 0x00040008 392d6c418e4SMasahiro Yamada 393d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_pitch { 394d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_hdr tag_hdr; 395d6c418e4SMasahiro Yamada union { 396d6c418e4SMasahiro Yamada struct { 397d6c418e4SMasahiro Yamada } req; 398d6c418e4SMasahiro Yamada struct { 399d6c418e4SMasahiro Yamada u32 pitch; 400d6c418e4SMasahiro Yamada } resp; 401d6c418e4SMasahiro Yamada } body; 402d6c418e4SMasahiro Yamada }; 403d6c418e4SMasahiro Yamada 404d6c418e4SMasahiro Yamada /* Offset of display window within buffer */ 405d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_GET_VIRTUAL_OFFSET 0x00040009 406d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_TEST_VIRTUAL_OFFSET 0x00044009 407d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_SET_VIRTUAL_OFFSET 0x00048009 408d6c418e4SMasahiro Yamada 409d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_virtual_offset { 410d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_hdr tag_hdr; 411d6c418e4SMasahiro Yamada union { 412d6c418e4SMasahiro Yamada /* req not used for get */ 413d6c418e4SMasahiro Yamada struct { 414d6c418e4SMasahiro Yamada u32 x; 415d6c418e4SMasahiro Yamada u32 y; 416d6c418e4SMasahiro Yamada } req; 417d6c418e4SMasahiro Yamada struct { 418d6c418e4SMasahiro Yamada u32 x; 419d6c418e4SMasahiro Yamada u32 y; 420d6c418e4SMasahiro Yamada } resp; 421d6c418e4SMasahiro Yamada } body; 422d6c418e4SMasahiro Yamada }; 423d6c418e4SMasahiro Yamada 424d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_GET_OVERSCAN 0x0004000a 425d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_TEST_OVERSCAN 0x0004400a 426d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_SET_OVERSCAN 0x0004800a 427d6c418e4SMasahiro Yamada 428d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_overscan { 429d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_hdr tag_hdr; 430d6c418e4SMasahiro Yamada union { 431d6c418e4SMasahiro Yamada /* req not used for get */ 432d6c418e4SMasahiro Yamada struct { 433d6c418e4SMasahiro Yamada u32 top; 434d6c418e4SMasahiro Yamada u32 bottom; 435d6c418e4SMasahiro Yamada u32 left; 436d6c418e4SMasahiro Yamada u32 right; 437d6c418e4SMasahiro Yamada } req; 438d6c418e4SMasahiro Yamada struct { 439d6c418e4SMasahiro Yamada u32 top; 440d6c418e4SMasahiro Yamada u32 bottom; 441d6c418e4SMasahiro Yamada u32 left; 442d6c418e4SMasahiro Yamada u32 right; 443d6c418e4SMasahiro Yamada } resp; 444d6c418e4SMasahiro Yamada } body; 445d6c418e4SMasahiro Yamada }; 446d6c418e4SMasahiro Yamada 447d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_GET_PALETTE 0x0004000b 448d6c418e4SMasahiro Yamada 449d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_get_palette { 450d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_hdr tag_hdr; 451d6c418e4SMasahiro Yamada union { 452d6c418e4SMasahiro Yamada struct { 453d6c418e4SMasahiro Yamada } req; 454d6c418e4SMasahiro Yamada struct { 455d6c418e4SMasahiro Yamada u32 data[1024]; 456d6c418e4SMasahiro Yamada } resp; 457d6c418e4SMasahiro Yamada } body; 458d6c418e4SMasahiro Yamada }; 459d6c418e4SMasahiro Yamada 460d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_TEST_PALETTE 0x0004400b 461d6c418e4SMasahiro Yamada 462d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_test_palette { 463d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_hdr tag_hdr; 464d6c418e4SMasahiro Yamada union { 465d6c418e4SMasahiro Yamada struct { 466d6c418e4SMasahiro Yamada u32 offset; 467d6c418e4SMasahiro Yamada u32 num_entries; 468d6c418e4SMasahiro Yamada u32 data[256]; 469d6c418e4SMasahiro Yamada } req; 470d6c418e4SMasahiro Yamada struct { 471d6c418e4SMasahiro Yamada u32 is_invalid; 472d6c418e4SMasahiro Yamada } resp; 473d6c418e4SMasahiro Yamada } body; 474d6c418e4SMasahiro Yamada }; 475d6c418e4SMasahiro Yamada 476d6c418e4SMasahiro Yamada #define BCM2835_MBOX_TAG_SET_PALETTE 0x0004800b 477d6c418e4SMasahiro Yamada 478d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_set_palette { 479d6c418e4SMasahiro Yamada struct bcm2835_mbox_tag_hdr tag_hdr; 480d6c418e4SMasahiro Yamada union { 481d6c418e4SMasahiro Yamada struct { 482d6c418e4SMasahiro Yamada u32 offset; 483d6c418e4SMasahiro Yamada u32 num_entries; 484d6c418e4SMasahiro Yamada u32 data[256]; 485d6c418e4SMasahiro Yamada } req; 486d6c418e4SMasahiro Yamada struct { 487d6c418e4SMasahiro Yamada u32 is_invalid; 488d6c418e4SMasahiro Yamada } resp; 489d6c418e4SMasahiro Yamada } body; 490d6c418e4SMasahiro Yamada }; 491d6c418e4SMasahiro Yamada 492d6c418e4SMasahiro Yamada /* 493d6c418e4SMasahiro Yamada * Pass a raw u32 message to the VC, and receive a raw u32 back. 494d6c418e4SMasahiro Yamada * 495d6c418e4SMasahiro Yamada * Returns 0 for success, any other value for error. 496d6c418e4SMasahiro Yamada */ 497d6c418e4SMasahiro Yamada int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv); 498d6c418e4SMasahiro Yamada 499d6c418e4SMasahiro Yamada /* 500d6c418e4SMasahiro Yamada * Pass a complete property-style buffer to the VC, and wait until it has 501d6c418e4SMasahiro Yamada * been processed. 502d6c418e4SMasahiro Yamada * 503d6c418e4SMasahiro Yamada * This function expects a pointer to the mbox_hdr structure in an attempt 504d6c418e4SMasahiro Yamada * to ensure some degree of type safety. However, some number of tags and 505d6c418e4SMasahiro Yamada * a termination value are expected to immediately follow the header in 506d6c418e4SMasahiro Yamada * memory, as required by the property protocol. 507d6c418e4SMasahiro Yamada * 5084342557fSAlexander Stein * Each struct bcm2835_mbox_hdr passed must be allocated with 5094342557fSAlexander Stein * ALLOC_CACHE_ALIGN_BUFFER(x, y, z) to ensure proper cache flush/invalidate. 5104342557fSAlexander Stein * 511d6c418e4SMasahiro Yamada * Returns 0 for success, any other value for error. 512d6c418e4SMasahiro Yamada */ 513d6c418e4SMasahiro Yamada int bcm2835_mbox_call_prop(u32 chan, struct bcm2835_mbox_hdr *buffer); 514d6c418e4SMasahiro Yamada 515d6c418e4SMasahiro Yamada #endif 516