1 /* 2 * Copyright (C) 2012 Vikram Narayananan 3 * <vikram186@gmail.com> 4 * (C) Copyright 2012,2015 Stephen Warren 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef _BCM2835_GPIO_H_ 10 #define _BCM2835_GPIO_H_ 11 12 #define BCM2835_GPIO_COUNT 54 13 14 #define BCM2835_GPIO_FSEL_MASK 0x7 15 #define BCM2835_GPIO_INPUT 0x0 16 #define BCM2835_GPIO_OUTPUT 0x1 17 #define BCM2835_GPIO_ALT0 0x4 18 #define BCM2835_GPIO_ALT1 0x5 19 #define BCM2835_GPIO_ALT2 0x6 20 #define BCM2835_GPIO_ALT3 0x7 21 #define BCM2835_GPIO_ALT4 0x3 22 #define BCM2835_GPIO_ALT5 0x2 23 24 #define BCM2835_GPIO_COMMON_BANK(gpio) ((gpio < 32) ? 0 : 1) 25 #define BCM2835_GPIO_COMMON_SHIFT(gpio) (gpio & 0x1f) 26 27 #define BCM2835_GPIO_FSEL_BANK(gpio) (gpio / 10) 28 #define BCM2835_GPIO_FSEL_SHIFT(gpio) ((gpio % 10) * 3) 29 30 struct bcm2835_gpio_regs { 31 u32 gpfsel[6]; 32 u32 reserved1; 33 u32 gpset[2]; 34 u32 reserved2; 35 u32 gpclr[2]; 36 u32 reserved3; 37 u32 gplev[2]; 38 u32 reserved4; 39 u32 gpeds[2]; 40 u32 reserved5; 41 u32 gpren[2]; 42 u32 reserved6; 43 u32 gpfen[2]; 44 u32 reserved7; 45 u32 gphen[2]; 46 u32 reserved8; 47 u32 gplen[2]; 48 u32 reserved9; 49 u32 gparen[2]; 50 u32 reserved10; 51 u32 gppud; 52 u32 gppudclk[2]; 53 }; 54 55 /** 56 * struct bcm2835_gpio_platdata - GPIO platform description 57 * 58 * @base: Base address of GPIO controller 59 */ 60 struct bcm2835_gpio_platdata { 61 unsigned long base; 62 }; 63 64 #endif /* _BCM2835_GPIO_H_ */ 65