1 /* 2 * (C) Copyright 2007 3 * Stelian Pop <stelian@popies.net> 4 * Lead Tech Design <www.leadtechdesign.com> 5 * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 #ifndef __ASM_ARM_ARCH_CLK_H__ 10 #define __ASM_ARM_ARCH_CLK_H__ 11 12 #include <asm/arch/hardware.h> 13 #include <asm/arch/at91_pmc.h> 14 #include <asm/global_data.h> 15 16 static inline unsigned long get_cpu_clk_rate(void) 17 { 18 DECLARE_GLOBAL_DATA_PTR; 19 return gd->arch.cpu_clk_rate_hz; 20 } 21 22 static inline unsigned long get_main_clk_rate(void) 23 { 24 DECLARE_GLOBAL_DATA_PTR; 25 return gd->arch.main_clk_rate_hz; 26 } 27 28 static inline unsigned long get_mck_clk_rate(void) 29 { 30 DECLARE_GLOBAL_DATA_PTR; 31 return gd->arch.mck_rate_hz; 32 } 33 34 static inline unsigned long get_plla_clk_rate(void) 35 { 36 DECLARE_GLOBAL_DATA_PTR; 37 return gd->arch.plla_rate_hz; 38 } 39 40 static inline unsigned long get_pllb_clk_rate(void) 41 { 42 DECLARE_GLOBAL_DATA_PTR; 43 return gd->arch.pllb_rate_hz; 44 } 45 46 static inline u32 get_pllb_init(void) 47 { 48 DECLARE_GLOBAL_DATA_PTR; 49 return gd->arch.at91_pllb_usb_init; 50 } 51 52 #ifdef CPU_HAS_H32MXDIV 53 static inline unsigned int get_h32mxdiv(void) 54 { 55 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; 56 57 return readl(&pmc->mckr) & AT91_PMC_MCKR_H32MXDIV; 58 } 59 #else 60 static inline unsigned int get_h32mxdiv(void) 61 { 62 return 0; 63 } 64 #endif 65 66 static inline unsigned long get_macb_pclk_rate(unsigned int dev_id) 67 { 68 if (get_h32mxdiv()) 69 return get_mck_clk_rate() / 2; 70 else 71 return get_mck_clk_rate(); 72 } 73 74 static inline unsigned long get_usart_clk_rate(unsigned int dev_id) 75 { 76 if (get_h32mxdiv()) 77 return get_mck_clk_rate() / 2; 78 else 79 return get_mck_clk_rate(); 80 } 81 82 static inline unsigned long get_lcdc_clk_rate(unsigned int dev_id) 83 { 84 return get_mck_clk_rate(); 85 } 86 87 static inline unsigned long get_spi_clk_rate(unsigned int dev_id) 88 { 89 if (get_h32mxdiv()) 90 return get_mck_clk_rate() / 2; 91 else 92 return get_mck_clk_rate(); 93 } 94 95 static inline unsigned long get_twi_clk_rate(unsigned int dev_id) 96 { 97 if (get_h32mxdiv()) 98 return get_mck_clk_rate() / 2; 99 else 100 return get_mck_clk_rate(); 101 } 102 103 static inline unsigned long get_mci_clk_rate(void) 104 { 105 if (get_h32mxdiv()) 106 return get_mck_clk_rate() / 2; 107 else 108 return get_mck_clk_rate(); 109 } 110 111 static inline unsigned long get_pit_clk_rate(void) 112 { 113 if (get_h32mxdiv()) 114 return get_mck_clk_rate() / 2; 115 else 116 return get_mck_clk_rate(); 117 } 118 119 int at91_clock_init(unsigned long main_clock); 120 void at91_periph_clk_enable(int id); 121 void at91_periph_clk_disable(int id); 122 #endif /* __ASM_ARM_ARCH_CLK_H__ */ 123