1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9260_matrix.h] 4 * 5 * Copyright (C) 2007 Atmel Corporation. 6 * 7 * Memory Controllers (MATRIX, EBI) - System peripherals registers. 8 * Based on AT91SAM9260 datasheet revision B. 9 */ 10 11 #ifndef AT91SAM9260_MATRIX_H 12 #define AT91SAM9260_MATRIX_H 13 14 #ifndef __ASSEMBLY__ 15 16 /* 17 * This struct defines access to the matrix' maximum of 18 * 16 masters and 16 slaves. 19 * However, on the AT91SAM9260/9G20/9XE there exist only 20 * 6 Masters and 5 Slaves! 21 */ 22 struct at91_matrix { 23 u32 mcfg[16]; /* Master Configuration Registers */ 24 u32 scfg[16]; /* Slave Configuration Registers */ 25 u32 pras[16][2]; /* Priority Assignment Slave Registers */ 26 u32 mrcr; /* Master Remap Control Register */ 27 u32 filler[0x06]; 28 u32 ebicsa; /* EBI Chip Select Assignment Register */ 29 }; 30 31 #endif /* __ASSEMBLY__ */ 32 33 #define AT91_MATRIX_ULBT_INFINITE (0 << 0) 34 #define AT91_MATRIX_ULBT_SINGLE (1 << 0) 35 #define AT91_MATRIX_ULBT_FOUR (2 << 0) 36 #define AT91_MATRIX_ULBT_EIGHT (3 << 0) 37 #define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) 38 39 #define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) 40 #define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) 41 #define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) 42 #define AT91_MATRIX_FIXED_DEFMSTR_SHIFT 18 43 #define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) 44 #define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) 45 46 #define AT91_MATRIX_M0PR_SHIFT 0 47 #define AT91_MATRIX_M1PR_SHIFT 4 48 #define AT91_MATRIX_M2PR_SHIFT 8 49 #define AT91_MATRIX_M3PR_SHIFT 12 50 #define AT91_MATRIX_M4PR_SHIFT 16 51 #define AT91_MATRIX_M5PR_SHIFT 20 52 53 #define AT91_MATRIX_RCB0 (1 << 0) 54 #define AT91_MATRIX_RCB1 (1 << 1) 55 56 #define AT91_MATRIX_CS1A_SDRAMC (1 << 1) 57 #define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) 58 #define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) 59 #define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) 60 #define AT91_MATRIX_DBPUC (1 << 8) 61 #define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16) 62 #define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16) 63 #define AT91_MATRIX_EBI_IOSR_SEL (1 << 17) 64 65 /* Maximum Number of Allowed Cycles for a Burst */ 66 #define AT91_MATRIX_SLOT_CYCLE (0xff << 0) 67 #define AT91_MATRIX_SLOT_CYCLE_(x) (x << 0) 68 69 #endif 70