xref: /openbmc/u-boot/arch/arm/mach-at91/armv7/cpu.c (revision ee7bb5be)
1 /*
2  * (C) Copyright 2010
3  * Reinhard Meyer, reinhard.meyer@emk-elektronik.de
4  * (C) Copyright 2009
5  * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
6  * (C) Copyright 2013
7  * Bo Shen <voice.shen@atmel.com>
8  *
9  * SPDX-License-Identifier:	GPL-2.0+
10  */
11 
12 #include <common.h>
13 #include <asm/io.h>
14 #include <asm/arch/hardware.h>
15 #include <asm/arch/at91_pit.h>
16 #include <asm/arch/at91_gpbr.h>
17 #include <asm/arch/clk.h>
18 
19 #ifndef CONFIG_SYS_AT91_MAIN_CLOCK
20 #define CONFIG_SYS_AT91_MAIN_CLOCK 0
21 #endif
22 
23 int arch_cpu_init(void)
24 {
25 	return at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
26 }
27 
28 void arch_preboot_os(void)
29 {
30 	ulong cpiv;
31 	at91_pit_t *pit = (at91_pit_t *)ATMEL_BASE_PIT;
32 
33 	cpiv = AT91_PIT_MR_PIV_MASK(readl(&pit->piir));
34 
35 	/*
36 	 * Disable PITC
37 	 * Add 0x1000 to current counter to stop it faster
38 	 * without waiting for wrapping back to 0
39 	 */
40 	writel(cpiv + 0x1000, &pit->mr);
41 }
42 
43 #if defined(CONFIG_DISPLAY_CPUINFO)
44 int print_cpuinfo(void)
45 {
46 	char buf[32];
47 
48 	printf("CPU: %s\n", get_cpu_name());
49 	printf("Crystal frequency: %8s MHz\n",
50 	       strmhz(buf, get_main_clk_rate()));
51 	printf("CPU clock        : %8s MHz\n",
52 	       strmhz(buf, get_cpu_clk_rate()));
53 	printf("Master clock     : %8s MHz\n",
54 	       strmhz(buf, get_mck_clk_rate()));
55 
56 	return 0;
57 }
58 #endif
59 
60 void enable_caches(void)
61 {
62 	icache_enable();
63 	dcache_enable();
64 }
65 
66 #define ATMEL_CHIPID_CIDR_VERSION	0x1f
67 
68 unsigned int get_chip_id(void)
69 {
70 	return readl(ATMEL_CHIPID_CIDR) & ~ATMEL_CHIPID_CIDR_VERSION;
71 }
72 
73 unsigned int get_extension_chip_id(void)
74 {
75 	return readl(ATMEL_CHIPID_EXID);
76 }
77