xref: /openbmc/u-boot/arch/arm/mach-at91/armv7/cpu.c (revision 282ce645)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2010
4  * Reinhard Meyer, reinhard.meyer@emk-elektronik.de
5  * (C) Copyright 2009
6  * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7  * (C) Copyright 2013
8  * Bo Shen <voice.shen@atmel.com>
9  */
10 
11 #include <common.h>
12 #include <asm/io.h>
13 #include <asm/arch/hardware.h>
14 #include <asm/arch/at91_pit.h>
15 #include <asm/arch/at91_gpbr.h>
16 #include <asm/arch/clk.h>
17 
18 #ifndef CONFIG_SYS_AT91_MAIN_CLOCK
19 #define CONFIG_SYS_AT91_MAIN_CLOCK 0
20 #endif
21 
22 int arch_cpu_init(void)
23 {
24 	return at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
25 }
26 
27 void arch_preboot_os(void)
28 {
29 	ulong cpiv;
30 	at91_pit_t *pit = (at91_pit_t *)ATMEL_BASE_PIT;
31 
32 	cpiv = AT91_PIT_MR_PIV_MASK(readl(&pit->piir));
33 
34 	/*
35 	 * Disable PITC
36 	 * Add 0x1000 to current counter to stop it faster
37 	 * without waiting for wrapping back to 0
38 	 */
39 	writel(cpiv + 0x1000, &pit->mr);
40 }
41 
42 #if defined(CONFIG_DISPLAY_CPUINFO)
43 int print_cpuinfo(void)
44 {
45 	char buf[32];
46 
47 	printf("CPU: %s\n", get_cpu_name());
48 	printf("Crystal frequency: %8s MHz\n",
49 	       strmhz(buf, get_main_clk_rate()));
50 	printf("CPU clock        : %8s MHz\n",
51 	       strmhz(buf, get_cpu_clk_rate()));
52 	printf("Master clock     : %8s MHz\n",
53 	       strmhz(buf, get_mck_clk_rate()));
54 
55 	return 0;
56 }
57 #endif
58 
59 void enable_caches(void)
60 {
61 	icache_enable();
62 	dcache_enable();
63 }
64 
65 #define ATMEL_CHIPID_CIDR_VERSION	0x1f
66 
67 unsigned int get_chip_id(void)
68 {
69 	return readl(ATMEL_CHIPID_CIDR) & ~ATMEL_CHIPID_CIDR_VERSION;
70 }
71 
72 unsigned int get_extension_chip_id(void)
73 {
74 	return readl(ATMEL_CHIPID_EXID);
75 }
76