1 /* 2 * (C) Copyright 2007-2008 3 * Stelian Pop <stelian@popies.net> 4 * Lead Tech Design <www.leadtechdesign.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #include <common.h> 10 #include <asm/io.h> 11 #include <asm/arch/at91_common.h> 12 #include <asm/arch/clk.h> 13 #include <asm/arch/gpio.h> 14 15 /* 16 * if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all 17 * peripheral pins. Good to have if hardware is soldered optionally 18 * or in case of SPI no slave is selected. Avoid lines to float 19 * needlessly. Use a short local PUP define. 20 * 21 * Due to errata "TXD floats when CTS is inactive" pullups are always 22 * on for TXD pins. 23 */ 24 #ifdef CONFIG_AT91_GPIO_PULLUP 25 # define PUP CONFIG_AT91_GPIO_PULLUP 26 #else 27 # define PUP 0 28 #endif 29 30 void at91_serial0_hw_init(void) 31 { 32 at91_set_a_periph(AT91_PIO_PORTC, 8, 1); /* TXD0 */ 33 at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* RXD0 */ 34 at91_periph_clk_enable(ATMEL_ID_USART0); 35 } 36 37 void at91_serial1_hw_init(void) 38 { 39 at91_set_a_periph(AT91_PIO_PORTC, 12, 1); /* TXD1 */ 40 at91_set_a_periph(AT91_PIO_PORTC, 13, 0); /* RXD1 */ 41 at91_periph_clk_enable(ATMEL_ID_USART1); 42 } 43 44 void at91_serial2_hw_init(void) 45 { 46 at91_set_a_periph(AT91_PIO_PORTC, 14, 1); /* TXD2 */ 47 at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* RXD2 */ 48 at91_periph_clk_enable(ATMEL_ID_USART2); 49 } 50 51 void at91_seriald_hw_init(void) 52 { 53 at91_set_a_periph(AT91_PIO_PORTA, 9, 0); /* DRXD */ 54 at91_set_a_periph(AT91_PIO_PORTA, 10, 1); /* DTXD */ 55 at91_periph_clk_enable(ATMEL_ID_SYS); 56 } 57 58 #ifdef CONFIG_ATMEL_SPI 59 void at91_spi0_hw_init(unsigned long cs_mask) 60 { 61 at91_set_a_periph(AT91_PIO_PORTA, 0, PUP); /* SPI0_MISO */ 62 at91_set_a_periph(AT91_PIO_PORTA, 1, PUP); /* SPI0_MOSI */ 63 at91_set_a_periph(AT91_PIO_PORTA, 2, PUP); /* SPI0_SPCK */ 64 65 at91_periph_clk_enable(ATMEL_ID_SPI0); 66 67 if (cs_mask & (1 << 0)) { 68 at91_set_a_periph(AT91_PIO_PORTA, 3, 1); 69 } 70 if (cs_mask & (1 << 1)) { 71 at91_set_a_periph(AT91_PIO_PORTA, 4, 1); 72 } 73 if (cs_mask & (1 << 2)) { 74 at91_set_a_periph(AT91_PIO_PORTA, 5, 1); 75 } 76 if (cs_mask & (1 << 3)) { 77 at91_set_a_periph(AT91_PIO_PORTA, 6, 1); 78 } 79 if (cs_mask & (1 << 4)) { 80 at91_set_pio_output(AT91_PIO_PORTA, 3, 1); 81 } 82 if (cs_mask & (1 << 5)) { 83 at91_set_pio_output(AT91_PIO_PORTA, 4, 1); 84 } 85 if (cs_mask & (1 << 6)) { 86 at91_set_pio_output(AT91_PIO_PORTA, 5, 1); 87 } 88 if (cs_mask & (1 << 7)) { 89 at91_set_pio_output(AT91_PIO_PORTA, 6, 1); 90 } 91 } 92 93 void at91_spi1_hw_init(unsigned long cs_mask) 94 { 95 at91_set_a_periph(AT91_PIO_PORTB, 30, PUP); /* SPI1_MISO */ 96 at91_set_a_periph(AT91_PIO_PORTB, 31, PUP); /* SPI1_MOSI */ 97 at91_set_a_periph(AT91_PIO_PORTB, 29, PUP); /* SPI1_SPCK */ 98 99 at91_periph_clk_enable(ATMEL_ID_SPI1); 100 101 if (cs_mask & (1 << 0)) { 102 at91_set_a_periph(AT91_PIO_PORTB, 28, 1); 103 } 104 if (cs_mask & (1 << 1)) { 105 at91_set_b_periph(AT91_PIO_PORTA, 24, 1); 106 } 107 if (cs_mask & (1 << 2)) { 108 at91_set_b_periph(AT91_PIO_PORTA, 25, 1); 109 } 110 if (cs_mask & (1 << 3)) { 111 at91_set_a_periph(AT91_PIO_PORTA, 26, 1); 112 } 113 if (cs_mask & (1 << 4)) { 114 at91_set_pio_output(AT91_PIO_PORTB, 28, 1); 115 } 116 if (cs_mask & (1 << 5)) { 117 at91_set_pio_output(AT91_PIO_PORTA, 24, 1); 118 } 119 if (cs_mask & (1 << 6)) { 120 at91_set_pio_output(AT91_PIO_PORTA, 25, 1); 121 } 122 if (cs_mask & (1 << 7)) { 123 at91_set_pio_output(AT91_PIO_PORTA, 26, 1); 124 } 125 } 126 #endif 127