1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (c) 2016 Google, Inc 4 */ 5 #include <common.h> 6 #include <dm.h> 7 #include <ram.h> 8 #include <timer.h> 9 #include <asm/io.h> 10 #include <asm/arch/timer.h> 11 #include <linux/err.h> 12 #include <dm/uclass.h> 13 14 DECLARE_GLOBAL_DATA_PTR; 15 16 __weak int board_init(void) 17 { 18 struct udevice *dev; 19 int i; 20 int ret; 21 22 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; 23 24 /* 25 * Loop over all MISC uclass drivers to call the comphy code 26 * and init all CP110 devices enabled in the DT 27 */ 28 i = 0; 29 while (1) { 30 /* Call the comphy code via the MISC uclass driver */ 31 ret = uclass_get_device(UCLASS_MISC, i++, &dev); 32 33 /* We're done, once no further CP110 device is found */ 34 if (ret) 35 break; 36 } 37 38 return 0; 39 } 40 41 #define SDMC_CONFIG_VRAM_GET(x) ((x >> 2) & 0x3) 42 #define SDMC_CONFIG_MEM_GET(x) (x & 0x3) 43 #define SDMC_CONFIG_ECC_STATUS_GET(x) ((x) & BIT(7)) 44 45 static const u32 ast2500_dram_table[] = { 46 0x08000000, //128MB 47 0x10000000, //256MB 48 0x20000000, //512MB 49 0x40000000, //1024MB 50 }; 51 52 u32 53 ast_sdmc_get_mem_size(void) 54 { 55 u32 size = 0; 56 u32 size_conf = SDMC_CONFIG_MEM_GET(readl(0x1e6e0004)); 57 58 size = ast2500_dram_table[size_conf]; 59 60 return size; 61 62 } 63 64 static const u32 aspeed_vram_table[] = { 65 0x00800000, //8MB 66 0x01000000, //16MB 67 0x02000000, //32MB 68 0x04000000, //64MB 69 }; 70 71 static u32 72 ast_sdmc_get_vram_size(void) 73 { 74 u32 size_conf = SDMC_CONFIG_VRAM_GET(readl(0x1e6e0004)); 75 return aspeed_vram_table[size_conf]; 76 } 77 78 static bool ast_sdmc_is_ecc_on(void) 79 { 80 u32 ecc_status = SDMC_CONFIG_ECC_STATUS_GET(readl(0x1e6e0004)); 81 82 return !!ecc_status; 83 } 84 85 static u32 ast_sdmc_get_ecc_size(void) 86 { 87 if (ast_sdmc_is_ecc_on()) 88 return readl(0x1e6e0054) + (1 << 20); 89 else 90 return 0; 91 } 92 93 __weak int dram_init(void) 94 { 95 #ifdef CONFIG_RAM 96 struct udevice *dev; 97 struct ram_info ram; 98 int ret; 99 100 ret = uclass_get_device(UCLASS_RAM, 0, &dev); 101 if (ret) { 102 debug("DRAM FAIL1\r\n"); 103 return ret; 104 } 105 106 ret = ram_get_info(dev, &ram); 107 if (ret) { 108 debug("DRAM FAIL2\r\n"); 109 return ret; 110 } 111 112 gd->ram_size = ram.size; 113 #else 114 u32 vga = ast_sdmc_get_vram_size(); 115 u32 dram = ast_sdmc_get_mem_size(); 116 117 #ifdef CONFIG_ARCH_FIXUP_FDT_MEMORY 118 /* 119 * U-boot will fixup the memory node in kernel's DT. The ECC redundancy 120 * is unable to handle now, just report the ECC size as the ram size. 121 */ 122 if (ast_sdmc_is_ecc_on()) 123 gd->ram_size = ast_sdmc_get_ecc_size(); 124 else 125 gd->ram_size = dram - vga; 126 #else 127 /* 128 * Report the memory size regardless the ECC redundancy, let kernel 129 * handle the ram paritions 130 */ 131 gd->ram_size = dram - vga; 132 #endif /* end of "#ifdef CONFIG_ARCH_FIXUP_FDT_MEMORY" */ 133 #endif /* end of "#ifdef CONFIG_RAM" */ 134 return 0; 135 } 136 137 void board_add_ram_info(int use_default) 138 { 139 u32 act_size = ast_sdmc_get_mem_size() >> 20; 140 u32 vga_rsvd = ast_sdmc_get_vram_size() >> 20; 141 u32 ecc_size = ast_sdmc_get_ecc_size() >> 20; 142 bool ecc_on = ast_sdmc_is_ecc_on(); 143 144 printf(" (capacity:%d MiB, VGA:%d MiB, ECC:%s", act_size, vga_rsvd, 145 ecc_on ? "on" : "off"); 146 147 if (ecc_on) 148 printf(", ECC size:%d MiB", ecc_size); 149 150 printf(")"); 151 } 152 153 int arch_early_init_r(void) 154 { 155 #ifdef CONFIG_DM_PCI 156 /* Trigger PCIe devices detection */ 157 pci_init(); 158 #endif 159 160 return 0; 161 } 162 163