1if ARCH_ASPEED 2 3config SYS_ARCH 4 default "arm" 5 6config SYS_SOC 7 default "aspeed" 8 9config SYS_TEXT_BASE 10 default 0x00000000 11 12choice 13 prompt "Aspeed SoC select" 14 depends on ARCH_ASPEED 15 default ASPEED_AST2500 16 17config ASPEED_AST2400 18 bool "Support Aspeed AST2400 SoC" 19 select CPU_ARM926EJS 20 help 21 The Aspeed AST2400 is a ARM-based SoC with arm926ejs CPU. 22 It is used as Board Management Controller on many server boards, 23 which is enabled by support of LPC and eSPI peripherals. 24 25config ASPEED_AST2500 26 bool "Support Aspeed AST2500 SoC" 27 select CPU_ARM1176 28 select SUPPORT_SPL 29 help 30 The Aspeed AST2500 is a ARM-based SoC with arm1176 CPU. 31 It is used as Board Management Controller on many server boards, 32 which is enabled by support of LPC and eSPI peripherals. 33 34config ASPEED_AST2600 35 bool "Support Aspeed AST2600 SoC" 36 select CPU_V7A 37 select CPU_V7_HAS_NONSEC 38 select ARCH_SUPPORT_PSCI 39 select SYS_ARCH_TIMER 40 select SUPPORT_SPL 41 select ENABLE_ARM_SOC_BOOT0_HOOK 42 help 43 The Aspeed AST2600 is a ARM-based SoC with Cortex-A7 CPU. 44 It is used as Board Management Controller on many server boards, 45 which is enabled by support of LPC and eSPI peripherals. 46endchoice 47 48config ASPEED_PALLADIUM 49 bool "Aspeed palladium for simulation" 50 default n 51 help 52 Say Y here to enable palladium build for simulation. 53 54 This is mainly for internal verification and investigation 55 on HW design. If not sure, say N. 56 57config ASPEED_SECURE_BOOT 58 bool "Support Aspeed secure boot feature" 59 depends on SPL && ASPEED_AST2600 60 select ENABLE_ARM_SOC_BOOT0_HOOK 61 select CMD_BOOTS 62 help 63 This option enables the support for secure boot. 64 65config ASPEED_SECURE_BOOT_DEBUG 66 bool "Enable debug support with secure boot" 67 default y 68 depends on ASPEED_SECURE_BOOT 69 help 70 This option allows the bootm command use 71 72config ASPEED_UBOOT_SPI_BASE 73 hex "U-Boot SPI base address" 74 default 0x0 75 help 76 The base address of the U-Boot image in 77 the memory mapped SPI space 78 79config ASPEED_UBOOT_SPI_SIZE 80 hex "U-Boot SPI size in bytes" 81 default 0x0 82 help 83 The size in bytes of the U-Boot image in 84 the memory mapped SPI space 85 86config ASPEED_UBOOT_MMC_BASE 87 hex "U-Boot eMMC base block" 88 default 0x0 89 help 90 The base block number of the U-Boot 91 image in the eMMC device 92 93config ASPEED_UBOOT_MMC_SIZE 94 hex "U-Boot eMMC size in blocks" 95 default 0x0 96 help 97 The size in block count of the U-Boot 98 image in the eMMC device 99 100config ASPEED_UBOOT_UART_SIZE 101 hex "U-Boot UART size in bytes" 102 default 0x0 103 help 104 The size of U-Boot image to be recevied 105 from UART device 106 107config ASPEED_UBOOT_DRAM_BASE 108 hex "U-Boot DRAM base address" 109 default 0x0 110 help 111 The DRAM address where the U-Boot image 112 will be loaded if XIP is not supported 113 114config ASPEED_KERNEL_FIT_SPI_BASE 115 hex "Kernel FIT SPI base address" 116 default 0x0 117 help 118 The base address of the kernel FIT image in 119 the memory mapped SPI space 120 121config ASPEED_KERNEL_FIT_SPI_SIZE 122 hex "Kernel FIT SPI size in bytes" 123 default 0x0 124 help 125 The size in bytes of the kernel FIT image in 126 the memory mapped SPI space 127 128config ASPEED_KERNEL_FIT_MMC_BASE 129 hex "Kernel FIT eMMC base block #" 130 default 0x0 131 help 132 The base block number of the kernel FIT 133 image in the eMMC device 134 135config ASPEED_KERNEL_FIT_MMC_SIZE 136 hex "Kernel FIT eMMC size in blocks" 137 default 0x0 138 help 139 The size in block count of the kernel FIT 140 image in the eMMC device 141 142config ASPEED_KERNEL_FIT_DRAM_BASE 143 hex "Kernel FIT DRAM base address" 144 default 0x0 145 help 146 The DRAM address where the Kernel FIT image 147 will be loaded if XIP is not supported 148 149source "arch/arm/mach-aspeed/ast2400/Kconfig" 150source "arch/arm/mach-aspeed/ast2500/Kconfig" 151source "arch/arm/mach-aspeed/ast2600/Kconfig" 152 153endif 154