xref: /openbmc/u-boot/arch/arm/mach-aspeed/Kconfig (revision 4e0b57fb)
1if ARCH_ASPEED
2
3config SYS_ARCH
4	default "arm"
5
6config SYS_SOC
7	default "aspeed"
8
9config SYS_TEXT_BASE
10	default 0x00000000
11
12choice
13	prompt "Aspeed SoC select"
14	depends on ARCH_ASPEED
15	default ASPEED_AST2500
16
17config ASPEED_AST2500
18	bool "Support Aspeed AST2500 SoC"
19	select CPU_ARM1176
20	select SUPPORT_SPL
21	help
22	  The Aspeed AST2500 is a ARM-based SoC with arm1176 CPU.
23	  It is used as Board Management Controller on many server boards,
24	  which is enabled by support of LPC and eSPI peripherals.
25
26config ASPEED_AST2600
27	bool "Support Aspeed AST2600 SoC"
28	select CPU_V7A
29	select CPU_V7_HAS_NONSEC
30	select ARCH_SUPPORT_PSCI
31	select SYS_ARCH_TIMER
32	select SUPPORT_SPL
33	help
34	  The Aspeed AST2600 is a ARM-based SoC with Cortex-A7 CPU.
35	  It is used as Board Management Controller on many server boards,
36	  which is enabled by support of LPC and eSPI peripherals.
37endchoice
38
39config ASPEED_PALLADIUM
40	bool "Aspeed palladium for simulation"
41	default n
42	help
43	  Say Y here to enable palladium build for simulation.
44
45	  This is mainly for internal verification and investigation
46	  on HW design. If not sure, say N.
47
48config SECURE_BOOT
49	bool "Support Aspeed secure boot feature"
50	depends on SPL && ASPEED_AST2600
51	select POSITION_INDEPENDENT
52	select ENABLE_ARM_SOC_BOOT0_HOOK
53	select FIT_SIGNATURE
54	help
55	  This option enables the support for secure boot.
56
57config SECURE_BOOT_TEXT_BASE
58	hex "Secure boot text base"
59	depends on SECURE_BOOT
60	default 0x90000000
61	help
62	  The address in memory where the secure boot verification
63	  on U-Boot image will be performed.
64
65source "arch/arm/mach-aspeed/ast2500/Kconfig"
66source "arch/arm/mach-aspeed/ast2600/Kconfig"
67
68endif
69