1if ARCH_ASPEED 2 3config SYS_ARCH 4 default "arm" 5 6config SYS_SOC 7 default "aspeed" 8 9config SYS_TEXT_BASE 10 default 0x00000000 11 12choice 13 prompt "Aspeed SoC select" 14 depends on ARCH_ASPEED 15 default ASPEED_AST2500 16 17config ASPEED_AST2400 18 bool "Support Aspeed AST2400 SoC" 19 select CPU_ARM926EJS 20 help 21 The Aspeed AST2400 is a ARM-based SoC with arm926ejs CPU. 22 It is used as Board Management Controller on many server boards, 23 which is enabled by support of LPC and eSPI peripherals. 24 25config ASPEED_AST2500 26 bool "Support Aspeed AST2500 SoC" 27 select CPU_ARM1176 28 select SUPPORT_SPL 29 help 30 The Aspeed AST2500 is a ARM-based SoC with arm1176 CPU. 31 It is used as Board Management Controller on many server boards, 32 which is enabled by support of LPC and eSPI peripherals. 33 34config ASPEED_AST2600 35 bool "Support Aspeed AST2600 SoC" 36 select CPU_V7A 37 select CPU_V7_HAS_NONSEC 38 select ARCH_SUPPORT_PSCI 39 select SYS_ARCH_TIMER 40 select SUPPORT_SPL 41 select ENABLE_ARM_SOC_BOOT0_HOOK 42 help 43 The Aspeed AST2600 is a ARM-based SoC with Cortex-A7 CPU. 44 It is used as Board Management Controller on many server boards, 45 which is enabled by support of LPC and eSPI peripherals. 46endchoice 47 48config ASPEED_AST2605 49 bool "Support Aspeed AST2605 boot" 50 51config ASPEED_PALLADIUM 52 bool "Aspeed palladium for simulation" 53 default n 54 help 55 Say Y here to enable palladium build for simulation. 56 57 This is mainly for internal verification and investigation 58 on HW design. If not sure, say N. 59 60config ASPEED_SECURE_BOOT 61 bool "Support Aspeed secure boot feature" 62 depends on SPL && ASPEED_AST2600 63 select ENABLE_ARM_SOC_BOOT0_HOOK 64 select CMD_BOOTS 65 help 66 This option enables the support for secure boot. 67 68config ASPEED_SECURE_BOOT_DEBUG 69 bool "Enable debug support with secure boot" 70 default y 71 depends on ASPEED_SECURE_BOOT 72 help 73 This option allows the bootm command use 74 75config ASPEED_UBOOT_SPI_BASE 76 hex "U-Boot SPI base address" 77 default 0x0 78 help 79 The base address of the U-Boot image in 80 the memory mapped SPI space 81 82config ASPEED_UBOOT_SPI_SIZE 83 hex "U-Boot SPI size in bytes" 84 default 0x0 85 help 86 The size in bytes of the U-Boot image in 87 the memory mapped SPI space 88 89config ASPEED_UBOOT_MMC_BASE 90 hex "U-Boot eMMC base block" 91 default 0x0 92 help 93 The base block number of the U-Boot 94 image in the eMMC device 95 96config ASPEED_UBOOT_MMC_SIZE 97 hex "U-Boot eMMC size in blocks" 98 default 0x0 99 help 100 The size in block count of the U-Boot 101 image in the eMMC device 102 103config ASPEED_UBOOT_UART_SIZE 104 hex "U-Boot UART size in bytes" 105 default 0x0 106 help 107 The size of U-Boot image to be recevied 108 from UART device 109 110config ASPEED_UBOOT_DRAM_BASE 111 hex "U-Boot DRAM base address" 112 default 0x0 113 help 114 The DRAM address where the U-Boot image 115 will be loaded if XIP is not supported 116 117config ASPEED_KERNEL_FIT_SPI_BASE 118 hex "Kernel FIT SPI base address" 119 default 0x0 120 help 121 The base address of the kernel FIT image in 122 the memory mapped SPI space 123 124config ASPEED_KERNEL_FIT_SPI_SIZE 125 hex "Kernel FIT SPI size in bytes" 126 default 0x0 127 help 128 The size in bytes of the kernel FIT image in 129 the memory mapped SPI space 130 131config ASPEED_KERNEL_FIT_MMC_BASE 132 hex "Kernel FIT eMMC base block #" 133 default 0x0 134 help 135 The base block number of the kernel FIT 136 image in the eMMC device 137 138config ASPEED_KERNEL_FIT_MMC_SIZE 139 hex "Kernel FIT eMMC size in blocks" 140 default 0x0 141 help 142 The size in block count of the kernel FIT 143 image in the eMMC device 144 145config ASPEED_KERNEL_FIT_DRAM_BASE 146 hex "Kernel FIT DRAM base address" 147 default 0x0 148 help 149 The DRAM address where the Kernel FIT image 150 will be loaded if XIP is not supported 151 152source "arch/arm/mach-aspeed/ast2400/Kconfig" 153source "arch/arm/mach-aspeed/ast2500/Kconfig" 154source "arch/arm/mach-aspeed/ast2600/Kconfig" 155 156endif 157