1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+ 212d8a729Srev13@wp.pl /* 312d8a729Srev13@wp.pl * (C) Copyright 2015 45be93569SKamil Lulko * Kamil Lulko, <kamil.lulko@gmail.com> 512d8a729Srev13@wp.pl */ 612d8a729Srev13@wp.pl 712d8a729Srev13@wp.pl #include <common.h> 812d8a729Srev13@wp.pl 912d8a729Srev13@wp.pl /* 1012d8a729Srev13@wp.pl * Upon exception entry ARMv7-M processors automatically save stack 1112d8a729Srev13@wp.pl * frames containing some registers. For simplicity initial 1212d8a729Srev13@wp.pl * implementation uses only this auto-saved stack frame. 1312d8a729Srev13@wp.pl * This does not contain complete register set dump, 1412d8a729Srev13@wp.pl * only R0-R3, R12, LR, PC and xPSR are saved. 1512d8a729Srev13@wp.pl */ 1612d8a729Srev13@wp.pl 1712d8a729Srev13@wp.pl struct autosave_regs { 1812d8a729Srev13@wp.pl long uregs[8]; 1912d8a729Srev13@wp.pl }; 2012d8a729Srev13@wp.pl 2112d8a729Srev13@wp.pl #define ARM_XPSR uregs[7] 2212d8a729Srev13@wp.pl #define ARM_PC uregs[6] 2312d8a729Srev13@wp.pl #define ARM_LR uregs[5] 2412d8a729Srev13@wp.pl #define ARM_R12 uregs[4] 2512d8a729Srev13@wp.pl #define ARM_R3 uregs[3] 2612d8a729Srev13@wp.pl #define ARM_R2 uregs[2] 2712d8a729Srev13@wp.pl #define ARM_R1 uregs[1] 2812d8a729Srev13@wp.pl #define ARM_R0 uregs[0] 2912d8a729Srev13@wp.pl 3012d8a729Srev13@wp.pl int interrupt_init(void) 3112d8a729Srev13@wp.pl { 3212d8a729Srev13@wp.pl return 0; 3312d8a729Srev13@wp.pl } 3412d8a729Srev13@wp.pl 3512d8a729Srev13@wp.pl void enable_interrupts(void) 3612d8a729Srev13@wp.pl { 3712d8a729Srev13@wp.pl return; 3812d8a729Srev13@wp.pl } 3912d8a729Srev13@wp.pl 4012d8a729Srev13@wp.pl int disable_interrupts(void) 4112d8a729Srev13@wp.pl { 4212d8a729Srev13@wp.pl return 0; 4312d8a729Srev13@wp.pl } 4412d8a729Srev13@wp.pl 4512d8a729Srev13@wp.pl void dump_regs(struct autosave_regs *regs) 4612d8a729Srev13@wp.pl { 4712d8a729Srev13@wp.pl printf("pc : %08lx lr : %08lx xPSR : %08lx\n", 4812d8a729Srev13@wp.pl regs->ARM_PC, regs->ARM_LR, regs->ARM_XPSR); 4912d8a729Srev13@wp.pl printf("r12 : %08lx r3 : %08lx r2 : %08lx\n" 5012d8a729Srev13@wp.pl "r1 : %08lx r0 : %08lx\n", 5112d8a729Srev13@wp.pl regs->ARM_R12, regs->ARM_R3, regs->ARM_R2, 5212d8a729Srev13@wp.pl regs->ARM_R1, regs->ARM_R0); 5312d8a729Srev13@wp.pl } 5412d8a729Srev13@wp.pl 5512d8a729Srev13@wp.pl void bad_mode(void) 5612d8a729Srev13@wp.pl { 5712d8a729Srev13@wp.pl panic("Resetting CPU ...\n"); 5812d8a729Srev13@wp.pl reset_cpu(0); 5912d8a729Srev13@wp.pl } 6012d8a729Srev13@wp.pl 6112d8a729Srev13@wp.pl void do_hard_fault(struct autosave_regs *autosave_regs) 6212d8a729Srev13@wp.pl { 6312d8a729Srev13@wp.pl printf("Hard fault\n"); 6412d8a729Srev13@wp.pl dump_regs(autosave_regs); 6512d8a729Srev13@wp.pl bad_mode(); 6612d8a729Srev13@wp.pl } 6712d8a729Srev13@wp.pl 6812d8a729Srev13@wp.pl void do_mm_fault(struct autosave_regs *autosave_regs) 6912d8a729Srev13@wp.pl { 7012d8a729Srev13@wp.pl printf("Memory management fault\n"); 7112d8a729Srev13@wp.pl dump_regs(autosave_regs); 7212d8a729Srev13@wp.pl bad_mode(); 7312d8a729Srev13@wp.pl } 7412d8a729Srev13@wp.pl 7512d8a729Srev13@wp.pl void do_bus_fault(struct autosave_regs *autosave_regs) 7612d8a729Srev13@wp.pl { 7712d8a729Srev13@wp.pl printf("Bus fault\n"); 7812d8a729Srev13@wp.pl dump_regs(autosave_regs); 7912d8a729Srev13@wp.pl bad_mode(); 8012d8a729Srev13@wp.pl } 8112d8a729Srev13@wp.pl 8212d8a729Srev13@wp.pl void do_usage_fault(struct autosave_regs *autosave_regs) 8312d8a729Srev13@wp.pl { 8412d8a729Srev13@wp.pl printf("Usage fault\n"); 8512d8a729Srev13@wp.pl dump_regs(autosave_regs); 8612d8a729Srev13@wp.pl bad_mode(); 8712d8a729Srev13@wp.pl } 8812d8a729Srev13@wp.pl 8912d8a729Srev13@wp.pl void do_invalid_entry(struct autosave_regs *autosave_regs) 9012d8a729Srev13@wp.pl { 9112d8a729Srev13@wp.pl printf("Exception\n"); 9212d8a729Srev13@wp.pl dump_regs(autosave_regs); 9312d8a729Srev13@wp.pl bad_mode(); 9412d8a729Srev13@wp.pl } 95