xref: /openbmc/u-boot/arch/arm/lib/interrupts.c (revision 6b44ae6b)
1 /*
2  * (C) Copyright 2003
3  * Texas Instruments <www.ti.com>
4  *
5  * (C) Copyright 2002
6  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
7  * Marius Groeger <mgroeger@sysgo.de>
8  *
9  * (C) Copyright 2002
10  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
11  * Alex Zuepke <azu@sysgo.de>
12  *
13  * (C) Copyright 2002-2004
14  * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
15  *
16  * (C) Copyright 2004
17  * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
18  *
19  * SPDX-License-Identifier:	GPL-2.0+
20  */
21 
22 #include <common.h>
23 #include <asm/proc-armv/ptrace.h>
24 #include <asm/u-boot-arm.h>
25 
26 DECLARE_GLOBAL_DATA_PTR;
27 
28 #ifdef CONFIG_USE_IRQ
29 int interrupt_init (void)
30 {
31 	unsigned long cpsr;
32 
33 	/*
34 	 * setup up stacks if necessary
35 	 */
36 	IRQ_STACK_START = gd->irq_sp - 4;
37 	IRQ_STACK_START_IN = gd->irq_sp + 8;
38 	FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
39 
40 
41 	__asm__ __volatile__("mrs %0, cpsr\n"
42 			     : "=r" (cpsr)
43 			     :
44 			     : "memory");
45 
46 	__asm__ __volatile__("msr cpsr_c, %0\n"
47 			     "mov sp, %1\n"
48 			     :
49 			     : "r" (IRQ_MODE | I_BIT | F_BIT | (cpsr & ~FIQ_MODE)),
50 			       "r" (IRQ_STACK_START)
51 			     : "memory");
52 
53 	__asm__ __volatile__("msr cpsr_c, %0\n"
54 			     "mov sp, %1\n"
55 			     :
56 			     : "r" (FIQ_MODE | I_BIT | F_BIT | (cpsr & ~IRQ_MODE)),
57 			       "r" (FIQ_STACK_START)
58 			     : "memory");
59 
60 	__asm__ __volatile__("msr cpsr_c, %0"
61 			     :
62 			     : "r" (cpsr)
63 			     : "memory");
64 
65 	return arch_interrupt_init();
66 }
67 
68 /* enable IRQ interrupts */
69 void enable_interrupts (void)
70 {
71 	unsigned long temp;
72 	__asm__ __volatile__("mrs %0, cpsr\n"
73 			     "bic %0, %0, #0x80\n"
74 			     "msr cpsr_c, %0"
75 			     : "=r" (temp)
76 			     :
77 			     : "memory");
78 }
79 
80 
81 /*
82  * disable IRQ/FIQ interrupts
83  * returns true if interrupts had been enabled before we disabled them
84  */
85 int disable_interrupts (void)
86 {
87 	unsigned long old,temp;
88 	__asm__ __volatile__("mrs %0, cpsr\n"
89 			     "orr %1, %0, #0xc0\n"
90 			     "msr cpsr_c, %1"
91 			     : "=r" (old), "=r" (temp)
92 			     :
93 			     : "memory");
94 	return (old & 0x80) == 0;
95 }
96 #else
97 int interrupt_init (void)
98 {
99 	/*
100 	 * setup up stacks if necessary
101 	 */
102 	IRQ_STACK_START_IN = gd->irq_sp + 8;
103 
104 	return 0;
105 }
106 
107 void enable_interrupts (void)
108 {
109 	return;
110 }
111 int disable_interrupts (void)
112 {
113 	return 0;
114 }
115 #endif
116 
117 
118 void bad_mode (void)
119 {
120 	panic ("Resetting CPU ...\n");
121 	reset_cpu (0);
122 }
123 
124 void show_regs (struct pt_regs *regs)
125 {
126 	unsigned long __maybe_unused flags;
127 	const char __maybe_unused *processor_modes[] = {
128 	"USER_26",	"FIQ_26",	"IRQ_26",	"SVC_26",
129 	"UK4_26",	"UK5_26",	"UK6_26",	"UK7_26",
130 	"UK8_26",	"UK9_26",	"UK10_26",	"UK11_26",
131 	"UK12_26",	"UK13_26",	"UK14_26",	"UK15_26",
132 	"USER_32",	"FIQ_32",	"IRQ_32",	"SVC_32",
133 	"UK4_32",	"UK5_32",	"UK6_32",	"ABT_32",
134 	"UK8_32",	"UK9_32",	"HYP_32",	"UND_32",
135 	"UK12_32",	"UK13_32",	"UK14_32",	"SYS_32",
136 	};
137 
138 	flags = condition_codes (regs);
139 
140 	printf("pc : [<%08lx>]	   lr : [<%08lx>]\n",
141 	       instruction_pointer(regs), regs->ARM_lr);
142 	if (gd->flags & GD_FLG_RELOC) {
143 		printf("reloc pc : [<%08lx>]	   lr : [<%08lx>]\n",
144 		       instruction_pointer(regs) - gd->reloc_off,
145 		       regs->ARM_lr - gd->reloc_off);
146 	}
147 	printf("sp : %08lx  ip : %08lx	 fp : %08lx\n",
148 	       regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
149 	printf ("r10: %08lx  r9 : %08lx	 r8 : %08lx\n",
150 		regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
151 	printf ("r7 : %08lx  r6 : %08lx	 r5 : %08lx  r4 : %08lx\n",
152 		regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
153 	printf ("r3 : %08lx  r2 : %08lx	 r1 : %08lx  r0 : %08lx\n",
154 		regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
155 	printf ("Flags: %c%c%c%c",
156 		flags & CC_N_BIT ? 'N' : 'n',
157 		flags & CC_Z_BIT ? 'Z' : 'z',
158 		flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
159 	printf ("  IRQs %s  FIQs %s  Mode %s%s\n",
160 		interrupts_enabled (regs) ? "on" : "off",
161 		fast_interrupts_enabled (regs) ? "on" : "off",
162 		processor_modes[processor_mode (regs)],
163 		thumb_mode (regs) ? " (T)" : "");
164 }
165 
166 void do_undefined_instruction (struct pt_regs *pt_regs)
167 {
168 	printf ("undefined instruction\n");
169 	show_regs (pt_regs);
170 	bad_mode ();
171 }
172 
173 void do_software_interrupt (struct pt_regs *pt_regs)
174 {
175 	printf ("software interrupt\n");
176 	show_regs (pt_regs);
177 	bad_mode ();
178 }
179 
180 void do_prefetch_abort (struct pt_regs *pt_regs)
181 {
182 	printf ("prefetch abort\n");
183 	show_regs (pt_regs);
184 	bad_mode ();
185 }
186 
187 void do_data_abort (struct pt_regs *pt_regs)
188 {
189 	printf ("data abort\n");
190 	show_regs (pt_regs);
191 	bad_mode ();
192 }
193 
194 void do_not_used (struct pt_regs *pt_regs)
195 {
196 	printf ("not used\n");
197 	show_regs (pt_regs);
198 	bad_mode ();
199 }
200 
201 void do_fiq (struct pt_regs *pt_regs)
202 {
203 	printf ("fast interrupt request\n");
204 	show_regs (pt_regs);
205 	bad_mode ();
206 }
207 
208 #ifndef CONFIG_USE_IRQ
209 void do_irq (struct pt_regs *pt_regs)
210 {
211 	printf ("interrupt request\n");
212 	show_regs (pt_regs);
213 	bad_mode ();
214 }
215 #endif
216