1*3ffa95c2SBhupesh Sharma/* 2*3ffa95c2SBhupesh Sharma * (C) Copyright 2015 Freescale Semiconductor 3*3ffa95c2SBhupesh Sharma * 4*3ffa95c2SBhupesh Sharma * SPDX-License-Identifier: GPL-2.0+ 5*3ffa95c2SBhupesh Sharma * 6*3ffa95c2SBhupesh Sharma * Extracted from gic_64.S 7*3ffa95c2SBhupesh Sharma */ 8*3ffa95c2SBhupesh Sharma 9*3ffa95c2SBhupesh Sharma#include <config.h> 10*3ffa95c2SBhupesh Sharma#include <linux/linkage.h> 11*3ffa95c2SBhupesh Sharma#include <asm/macro.h> 12*3ffa95c2SBhupesh Sharma 13*3ffa95c2SBhupesh Sharma/************************************************************************* 14*3ffa95c2SBhupesh Sharma * 15*3ffa95c2SBhupesh Sharma * void ccn504_add_masters_to_dvm(CCI_MN_BASE, CCI_MN_RNF_NODEID_LIST, 16*3ffa95c2SBhupesh Sharma * CCI_MN_DVM_DOMAIN_CTL_SET); 17*3ffa95c2SBhupesh Sharma * 18*3ffa95c2SBhupesh Sharma * Add fully-coherent masters to DVM domain 19*3ffa95c2SBhupesh Sharma * 20*3ffa95c2SBhupesh Sharma *************************************************************************/ 21*3ffa95c2SBhupesh SharmaENTRY(ccn504_add_masters_to_dvm) 22*3ffa95c2SBhupesh Sharma /* 23*3ffa95c2SBhupesh Sharma * x0: CCI_MN_BASE 24*3ffa95c2SBhupesh Sharma * x1: CCI_MN_RNF_NODEID_LIST 25*3ffa95c2SBhupesh Sharma * x2: CCI_MN_DVM_DOMAIN_CTL_SET 26*3ffa95c2SBhupesh Sharma */ 27*3ffa95c2SBhupesh Sharma 28*3ffa95c2SBhupesh Sharma /* Add fully-coherent masters to DVM domain */ 29*3ffa95c2SBhupesh Sharma ldr x9, [x0, x1] 30*3ffa95c2SBhupesh Sharma str x9, [x0, x2] 31*3ffa95c2SBhupesh Sharma1: ldr x10, [x0, x2] 32*3ffa95c2SBhupesh Sharma mvn x11, x10 33*3ffa95c2SBhupesh Sharma tst x11, x10 /* Wait for domain addition to complete */ 34*3ffa95c2SBhupesh Sharma b.ne 1b 35*3ffa95c2SBhupesh Sharma 36*3ffa95c2SBhupesh Sharma ret 37*3ffa95c2SBhupesh SharmaENDPROC(ccn504_add_masters_to_dvm) 38*3ffa95c2SBhupesh Sharma 39*3ffa95c2SBhupesh Sharma/************************************************************************* 40*3ffa95c2SBhupesh Sharma * 41*3ffa95c2SBhupesh Sharma * void ccn504_set_qos(CCI_Sx_QOS_CONTROL_BASE, QoS Value); 42*3ffa95c2SBhupesh Sharma * 43*3ffa95c2SBhupesh Sharma * Initialize QoS settings for AR/AW override. 44*3ffa95c2SBhupesh Sharma * Right now, this function sets the same QoS value for all RN-I ports 45*3ffa95c2SBhupesh Sharma * 46*3ffa95c2SBhupesh Sharma *************************************************************************/ 47*3ffa95c2SBhupesh SharmaENTRY(ccn504_set_qos) 48*3ffa95c2SBhupesh Sharma /* 49*3ffa95c2SBhupesh Sharma * x0: CCI_Sx_QOS_CONTROL_BASE 50*3ffa95c2SBhupesh Sharma * x1: QoS Value 51*3ffa95c2SBhupesh Sharma */ 52*3ffa95c2SBhupesh Sharma 53*3ffa95c2SBhupesh Sharma /* Set all RN-I ports to QoS value denoted by x1 */ 54*3ffa95c2SBhupesh Sharma ldr x9, [x0] 55*3ffa95c2SBhupesh Sharma mov x10, x1 56*3ffa95c2SBhupesh Sharma orr x9, x9, x10 57*3ffa95c2SBhupesh Sharma str x9, [x0] 58*3ffa95c2SBhupesh Sharma 59*3ffa95c2SBhupesh Sharma ret 60*3ffa95c2SBhupesh SharmaENDPROC(ccn504_set_qos) 61*3ffa95c2SBhupesh Sharma 62