xref: /openbmc/u-boot/arch/arm/lib/ccn504.S (revision 2b690b98)
13ffa95c2SBhupesh Sharma/*
23ffa95c2SBhupesh Sharma * (C) Copyright 2015 Freescale Semiconductor
33ffa95c2SBhupesh Sharma *
43ffa95c2SBhupesh Sharma * SPDX-License-Identifier:	GPL-2.0+
53ffa95c2SBhupesh Sharma *
63ffa95c2SBhupesh Sharma * Extracted from gic_64.S
73ffa95c2SBhupesh Sharma */
83ffa95c2SBhupesh Sharma
93ffa95c2SBhupesh Sharma#include <config.h>
103ffa95c2SBhupesh Sharma#include <linux/linkage.h>
113ffa95c2SBhupesh Sharma#include <asm/macro.h>
123ffa95c2SBhupesh Sharma
133ffa95c2SBhupesh Sharma/*************************************************************************
143ffa95c2SBhupesh Sharma *
153ffa95c2SBhupesh Sharma * void ccn504_add_masters_to_dvm(CCI_MN_BASE, CCI_MN_RNF_NODEID_LIST,
163ffa95c2SBhupesh Sharma * 				  CCI_MN_DVM_DOMAIN_CTL_SET);
173ffa95c2SBhupesh Sharma *
183ffa95c2SBhupesh Sharma * Add fully-coherent masters to DVM domain
193ffa95c2SBhupesh Sharma *
203ffa95c2SBhupesh Sharma *************************************************************************/
213ffa95c2SBhupesh SharmaENTRY(ccn504_add_masters_to_dvm)
223ffa95c2SBhupesh Sharma	/*
233ffa95c2SBhupesh Sharma	 * x0: CCI_MN_BASE
243ffa95c2SBhupesh Sharma	 * x1: CCI_MN_RNF_NODEID_LIST
253ffa95c2SBhupesh Sharma	 * x2: CCI_MN_DVM_DOMAIN_CTL_SET
263ffa95c2SBhupesh Sharma	 */
273ffa95c2SBhupesh Sharma
283ffa95c2SBhupesh Sharma	/* Add fully-coherent masters to DVM domain */
293ffa95c2SBhupesh Sharma	ldr	x9, [x0, x1]
303ffa95c2SBhupesh Sharma	str	x9, [x0, x2]
313ffa95c2SBhupesh Sharma1:	ldr	x10, [x0, x2]
323ffa95c2SBhupesh Sharma	mvn	x11, x10
333ffa95c2SBhupesh Sharma	tst	x11, x10 /* Wait for domain addition to complete */
343ffa95c2SBhupesh Sharma	b.ne	1b
353ffa95c2SBhupesh Sharma
363ffa95c2SBhupesh Sharma	ret
373ffa95c2SBhupesh SharmaENDPROC(ccn504_add_masters_to_dvm)
383ffa95c2SBhupesh Sharma
393ffa95c2SBhupesh Sharma/*************************************************************************
403ffa95c2SBhupesh Sharma *
413ffa95c2SBhupesh Sharma * void ccn504_set_qos(CCI_Sx_QOS_CONTROL_BASE, QoS Value);
423ffa95c2SBhupesh Sharma *
433ffa95c2SBhupesh Sharma * Initialize QoS settings for AR/AW override.
443ffa95c2SBhupesh Sharma * Right now, this function sets the same QoS value for all RN-I ports
453ffa95c2SBhupesh Sharma *
463ffa95c2SBhupesh Sharma *************************************************************************/
473ffa95c2SBhupesh SharmaENTRY(ccn504_set_qos)
483ffa95c2SBhupesh Sharma	/*
493ffa95c2SBhupesh Sharma	 * x0: CCI_Sx_QOS_CONTROL_BASE
503ffa95c2SBhupesh Sharma	 * x1: QoS Value
513ffa95c2SBhupesh Sharma	 */
523ffa95c2SBhupesh Sharma
533ffa95c2SBhupesh Sharma	/* Set all RN-I ports to QoS value denoted by x1 */
543ffa95c2SBhupesh Sharma	ldr	x9, [x0]
553ffa95c2SBhupesh Sharma	mov	x10, x1
563ffa95c2SBhupesh Sharma	orr	x9, x9, x10
573ffa95c2SBhupesh Sharma	str	x9, [x0]
583ffa95c2SBhupesh Sharma
593ffa95c2SBhupesh Sharma	ret
603ffa95c2SBhupesh SharmaENDPROC(ccn504_set_qos)
613ffa95c2SBhupesh Sharma
62*2b690b98SPrabhakar Kushwaha/*************************************************************************
63*2b690b98SPrabhakar Kushwaha *
64*2b690b98SPrabhakar Kushwaha * void ccn504_set_aux(CCI_AUX_CONTROL_BASE, Value);
65*2b690b98SPrabhakar Kushwaha *
66*2b690b98SPrabhakar Kushwaha * Initialize AUX control settings
67*2b690b98SPrabhakar Kushwaha *
68*2b690b98SPrabhakar Kushwaha *************************************************************************/
69*2b690b98SPrabhakar KushwahaENTRY(ccn504_set_aux)
70*2b690b98SPrabhakar Kushwaha	/*
71*2b690b98SPrabhakar Kushwaha	 * x0: CCI_AUX_CONTROL_BASE
72*2b690b98SPrabhakar Kushwaha	 * x1: Value
73*2b690b98SPrabhakar Kushwaha	 */
74*2b690b98SPrabhakar Kushwaha
75*2b690b98SPrabhakar Kushwaha	ldr	x9, [x0]
76*2b690b98SPrabhakar Kushwaha	mov	x10, x1
77*2b690b98SPrabhakar Kushwaha	orr	x9, x9, x10
78*2b690b98SPrabhakar Kushwaha	str	x9, [x0]
79*2b690b98SPrabhakar Kushwaha
80*2b690b98SPrabhakar Kushwaha	ret
81*2b690b98SPrabhakar KushwahaENDPROC(ccn504_set_aux)
82*2b690b98SPrabhakar Kushwaha
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