xref: /openbmc/u-boot/arch/arm/lib/ccn504.S (revision e8f80a5a)
1*83d290c5STom Rini/* SPDX-License-Identifier: GPL-2.0+ */
23ffa95c2SBhupesh Sharma/*
33ffa95c2SBhupesh Sharma * (C) Copyright 2015 Freescale Semiconductor
43ffa95c2SBhupesh Sharma *
53ffa95c2SBhupesh Sharma * Extracted from gic_64.S
63ffa95c2SBhupesh Sharma */
73ffa95c2SBhupesh Sharma
83ffa95c2SBhupesh Sharma#include <config.h>
93ffa95c2SBhupesh Sharma#include <linux/linkage.h>
103ffa95c2SBhupesh Sharma#include <asm/macro.h>
113ffa95c2SBhupesh Sharma
123ffa95c2SBhupesh Sharma/*************************************************************************
133ffa95c2SBhupesh Sharma *
143ffa95c2SBhupesh Sharma * void ccn504_add_masters_to_dvm(CCI_MN_BASE, CCI_MN_RNF_NODEID_LIST,
153ffa95c2SBhupesh Sharma * 				  CCI_MN_DVM_DOMAIN_CTL_SET);
163ffa95c2SBhupesh Sharma *
173ffa95c2SBhupesh Sharma * Add fully-coherent masters to DVM domain
183ffa95c2SBhupesh Sharma *
193ffa95c2SBhupesh Sharma *************************************************************************/
203ffa95c2SBhupesh SharmaENTRY(ccn504_add_masters_to_dvm)
213ffa95c2SBhupesh Sharma	/*
223ffa95c2SBhupesh Sharma	 * x0: CCI_MN_BASE
233ffa95c2SBhupesh Sharma	 * x1: CCI_MN_RNF_NODEID_LIST
243ffa95c2SBhupesh Sharma	 * x2: CCI_MN_DVM_DOMAIN_CTL_SET
253ffa95c2SBhupesh Sharma	 */
263ffa95c2SBhupesh Sharma
273ffa95c2SBhupesh Sharma	/* Add fully-coherent masters to DVM domain */
283ffa95c2SBhupesh Sharma	ldr	x9, [x0, x1]
293ffa95c2SBhupesh Sharma	str	x9, [x0, x2]
303ffa95c2SBhupesh Sharma1:	ldr	x10, [x0, x2]
313ffa95c2SBhupesh Sharma	mvn	x11, x10
323ffa95c2SBhupesh Sharma	tst	x11, x10 /* Wait for domain addition to complete */
333ffa95c2SBhupesh Sharma	b.ne	1b
343ffa95c2SBhupesh Sharma
353ffa95c2SBhupesh Sharma	ret
363ffa95c2SBhupesh SharmaENDPROC(ccn504_add_masters_to_dvm)
373ffa95c2SBhupesh Sharma
383ffa95c2SBhupesh Sharma/*************************************************************************
393ffa95c2SBhupesh Sharma *
403ffa95c2SBhupesh Sharma * void ccn504_set_qos(CCI_Sx_QOS_CONTROL_BASE, QoS Value);
413ffa95c2SBhupesh Sharma *
423ffa95c2SBhupesh Sharma * Initialize QoS settings for AR/AW override.
433ffa95c2SBhupesh Sharma * Right now, this function sets the same QoS value for all RN-I ports
443ffa95c2SBhupesh Sharma *
453ffa95c2SBhupesh Sharma *************************************************************************/
463ffa95c2SBhupesh SharmaENTRY(ccn504_set_qos)
473ffa95c2SBhupesh Sharma	/*
483ffa95c2SBhupesh Sharma	 * x0: CCI_Sx_QOS_CONTROL_BASE
493ffa95c2SBhupesh Sharma	 * x1: QoS Value
503ffa95c2SBhupesh Sharma	 */
513ffa95c2SBhupesh Sharma
523ffa95c2SBhupesh Sharma	/* Set all RN-I ports to QoS value denoted by x1 */
533ffa95c2SBhupesh Sharma	ldr	x9, [x0]
543ffa95c2SBhupesh Sharma	mov	x10, x1
553ffa95c2SBhupesh Sharma	orr	x9, x9, x10
563ffa95c2SBhupesh Sharma	str	x9, [x0]
573ffa95c2SBhupesh Sharma
583ffa95c2SBhupesh Sharma	ret
593ffa95c2SBhupesh SharmaENDPROC(ccn504_set_qos)
603ffa95c2SBhupesh Sharma
612b690b98SPrabhakar Kushwaha/*************************************************************************
622b690b98SPrabhakar Kushwaha *
632b690b98SPrabhakar Kushwaha * void ccn504_set_aux(CCI_AUX_CONTROL_BASE, Value);
642b690b98SPrabhakar Kushwaha *
652b690b98SPrabhakar Kushwaha * Initialize AUX control settings
662b690b98SPrabhakar Kushwaha *
672b690b98SPrabhakar Kushwaha *************************************************************************/
682b690b98SPrabhakar KushwahaENTRY(ccn504_set_aux)
692b690b98SPrabhakar Kushwaha	/*
702b690b98SPrabhakar Kushwaha	 * x0: CCI_AUX_CONTROL_BASE
712b690b98SPrabhakar Kushwaha	 * x1: Value
722b690b98SPrabhakar Kushwaha	 */
732b690b98SPrabhakar Kushwaha
742b690b98SPrabhakar Kushwaha	ldr	x9, [x0]
752b690b98SPrabhakar Kushwaha	mov	x10, x1
762b690b98SPrabhakar Kushwaha	orr	x9, x9, x10
772b690b98SPrabhakar Kushwaha	str	x9, [x0]
782b690b98SPrabhakar Kushwaha
792b690b98SPrabhakar Kushwaha	ret
802b690b98SPrabhakar KushwahaENDPROC(ccn504_set_aux)
812b690b98SPrabhakar Kushwaha
82