xref: /openbmc/u-boot/arch/arm/lib/cache.c (revision fe5b9b44)
1 /*
2  * (C) Copyright 2002
3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 /* for now: just dummy functions to satisfy the linker */
9 
10 #include <common.h>
11 
12 __weak void flush_cache(unsigned long start, unsigned long size)
13 {
14 #if defined(CONFIG_ARM1136)
15 
16 #if !defined(CONFIG_SYS_ICACHE_OFF)
17 	asm("mcr p15, 0, r1, c7, c5, 0"); /* invalidate I cache */
18 #endif
19 
20 #if !defined(CONFIG_SYS_DCACHE_OFF)
21 	asm("mcr p15, 0, r1, c7, c14, 0"); /* Clean+invalidate D cache */
22 #endif
23 
24 #endif /* CONFIG_ARM1136 */
25 
26 #ifdef CONFIG_ARM926EJS
27 	/* test and clean, page 2-23 of arm926ejs manual */
28 	asm("0: mrc p15, 0, r15, c7, c10, 3\n\t" "bne 0b\n" : : : "memory");
29 	/* disable write buffer as well (page 2-22) */
30 	asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
31 #endif /* CONFIG_ARM926EJS */
32 	return;
33 }
34 
35 /*
36  * Default implementation:
37  * do a range flush for the entire range
38  */
39 __weak void flush_dcache_all(void)
40 {
41 	flush_cache(0, ~0);
42 }
43 
44 /*
45  * Default implementation of enable_caches()
46  * Real implementation should be in platform code
47  */
48 __weak void enable_caches(void)
49 {
50 	puts("WARNING: Caches not enabled\n");
51 }
52