1 /* 2 * (C) Copyright 2010 3 * Texas Instruments, <www.ti.com> 4 * Aneesh V <aneesh@ti.com> 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 #include <linux/types.h> 25 #include <asm/io.h> 26 #include <asm/armv7.h> 27 #include <asm/pl310.h> 28 #include <config.h> 29 30 struct pl310_regs *const pl310 = (struct pl310_regs *)CONFIG_SYS_PL310_BASE; 31 32 static void pl310_cache_sync(void) 33 { 34 writel(0, &pl310->pl310_cache_sync); 35 } 36 37 static void pl310_background_op_all_ways(u32 *op_reg) 38 { 39 u32 assoc_16, associativity, way_mask; 40 41 assoc_16 = readl(&pl310->pl310_aux_ctrl) & 42 PL310_AUX_CTRL_ASSOCIATIVITY_MASK; 43 if (assoc_16) 44 associativity = 16; 45 else 46 associativity = 8; 47 48 way_mask = (1 << associativity) - 1; 49 /* Invalidate all ways */ 50 writel(way_mask, op_reg); 51 /* Wait for all ways to be invalidated */ 52 while (readl(op_reg) && way_mask) 53 ; 54 pl310_cache_sync(); 55 } 56 57 void v7_outer_cache_inval_all(void) 58 { 59 pl310_background_op_all_ways(&pl310->pl310_inv_way); 60 } 61 62 void v7_outer_cache_flush_all(void) 63 { 64 pl310_background_op_all_ways(&pl310->pl310_clean_inv_way); 65 } 66 67 /* Flush(clean invalidate) memory from start to stop-1 */ 68 void v7_outer_cache_flush_range(u32 start, u32 stop) 69 { 70 /* PL310 currently supports only 32 bytes cache line */ 71 u32 pa, line_size = 32; 72 73 /* 74 * Align to the beginning of cache-line - this ensures that 75 * the first 5 bits are 0 as required by PL310 TRM 76 */ 77 start &= ~(line_size - 1); 78 79 for (pa = start; pa < stop; pa = pa + line_size) 80 writel(pa, &pl310->pl310_clean_inv_line_pa); 81 82 pl310_cache_sync(); 83 } 84 85 /* invalidate memory from start to stop-1 */ 86 void v7_outer_cache_inval_range(u32 start, u32 stop) 87 { 88 /* PL310 currently supports only 32 bytes cache line */ 89 u32 pa, line_size = 32; 90 91 /* 92 * If start address is not aligned to cache-line flush the first 93 * line to prevent affecting somebody else's buffer 94 */ 95 if (start & (line_size - 1)) { 96 v7_outer_cache_flush_range(start, start + 1); 97 /* move to next cache line */ 98 start = (start + line_size - 1) & ~(line_size - 1); 99 } 100 101 /* 102 * If stop address is not aligned to cache-line flush the last 103 * line to prevent affecting somebody else's buffer 104 */ 105 if (stop & (line_size - 1)) { 106 v7_outer_cache_flush_range(stop, stop + 1); 107 /* align to the beginning of this cache line */ 108 stop &= ~(line_size - 1); 109 } 110 111 for (pa = start; pa < stop; pa = pa + line_size) 112 writel(pa, &pl310->pl310_inv_line_pa); 113 114 pl310_cache_sync(); 115 } 116