1 /* 2 * (C) Copyright 2010 3 * Texas Instruments, <www.ti.com> 4 * Aneesh V <aneesh@ti.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 #include <linux/types.h> 9 #include <asm/io.h> 10 #include <asm/armv7.h> 11 #include <asm/pl310.h> 12 #include <config.h> 13 #include <common.h> 14 15 struct pl310_regs *const pl310 = (struct pl310_regs *)CONFIG_SYS_PL310_BASE; 16 17 static void pl310_cache_sync(void) 18 { 19 writel(0, &pl310->pl310_cache_sync); 20 } 21 22 static void pl310_background_op_all_ways(u32 *op_reg) 23 { 24 u32 assoc_16, associativity, way_mask; 25 26 assoc_16 = readl(&pl310->pl310_aux_ctrl) & 27 PL310_AUX_CTRL_ASSOCIATIVITY_MASK; 28 if (assoc_16) 29 associativity = 16; 30 else 31 associativity = 8; 32 33 way_mask = (1 << associativity) - 1; 34 /* Invalidate all ways */ 35 writel(way_mask, op_reg); 36 /* Wait for all ways to be invalidated */ 37 while (readl(op_reg) && way_mask) 38 ; 39 pl310_cache_sync(); 40 } 41 42 void v7_outer_cache_inval_all(void) 43 { 44 pl310_background_op_all_ways(&pl310->pl310_inv_way); 45 } 46 47 void v7_outer_cache_flush_all(void) 48 { 49 pl310_background_op_all_ways(&pl310->pl310_clean_inv_way); 50 } 51 52 /* Flush(clean invalidate) memory from start to stop-1 */ 53 void v7_outer_cache_flush_range(u32 start, u32 stop) 54 { 55 /* PL310 currently supports only 32 bytes cache line */ 56 u32 pa, line_size = 32; 57 58 /* 59 * Align to the beginning of cache-line - this ensures that 60 * the first 5 bits are 0 as required by PL310 TRM 61 */ 62 start &= ~(line_size - 1); 63 64 for (pa = start; pa < stop; pa = pa + line_size) 65 writel(pa, &pl310->pl310_clean_inv_line_pa); 66 67 pl310_cache_sync(); 68 } 69 70 /* invalidate memory from start to stop-1 */ 71 void v7_outer_cache_inval_range(u32 start, u32 stop) 72 { 73 /* PL310 currently supports only 32 bytes cache line */ 74 u32 pa, line_size = 32; 75 76 /* 77 * If start address is not aligned to cache-line do not 78 * invalidate the first cache-line 79 */ 80 if (start & (line_size - 1)) { 81 printf("ERROR: %s - start address is not aligned - 0x%08x\n", 82 __func__, start); 83 /* move to next cache line */ 84 start = (start + line_size - 1) & ~(line_size - 1); 85 } 86 87 /* 88 * If stop address is not aligned to cache-line do not 89 * invalidate the last cache-line 90 */ 91 if (stop & (line_size - 1)) { 92 printf("ERROR: %s - stop address is not aligned - 0x%08x\n", 93 __func__, stop); 94 /* align to the beginning of this cache line */ 95 stop &= ~(line_size - 1); 96 } 97 98 for (pa = start; pa < stop; pa = pa + line_size) 99 writel(pa, &pl310->pl310_inv_line_pa); 100 101 pl310_cache_sync(); 102 } 103