1 /* 2 * Texas Instruments Keystone SerDes driver 3 * 4 * (C) Copyright 2014 5 * Texas Instruments Incorporated, <www.ti.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __TI_KEYSTONE_SERDES_H__ 11 #define __TI_KEYSTONE_SERDES_H__ 12 13 /* SERDES Reference clock */ 14 enum ks2_serdes_clock { 15 SERDES_CLOCK_100M, /* 100 MHz */ 16 SERDES_CLOCK_122P88M, /* 122.88 MHz */ 17 SERDES_CLOCK_125M, /* 125 MHz */ 18 SERDES_CLOCK_156P25M, /* 156.25 MHz */ 19 SERDES_CLOCK_312P5M, /* 312.5 MHz */ 20 }; 21 22 /* SERDES Lane Baud Rate */ 23 enum ks2_serdes_rate { 24 SERDES_RATE_4P9152G, /* 4.9152 GBaud */ 25 SERDES_RATE_5G, /* 5 GBaud */ 26 SERDES_RATE_6P144G, /* 6.144 GBaud */ 27 SERDES_RATE_6P25G, /* 6.25 GBaud */ 28 SERDES_RATE_10p3125g, /* 10.3215 GBaud */ 29 SERDES_RATE_12p5g, /* 12.5 GBaud */ 30 }; 31 32 /* SERDES Lane Rate Mode */ 33 enum ks2_serdes_rate_mode { 34 SERDES_FULL_RATE, 35 SERDES_HALF_RATE, 36 SERDES_QUARTER_RATE, 37 }; 38 39 /* SERDES PHY TYPE */ 40 enum ks2_serdes_interface { 41 SERDES_PHY_SGMII, 42 SERDES_PHY_PCSR, /* XGE SERDES */ 43 }; 44 45 struct ks2_serdes { 46 enum ks2_serdes_clock clk; 47 enum ks2_serdes_rate rate; 48 enum ks2_serdes_rate_mode rate_mode; 49 enum ks2_serdes_interface intf; 50 u32 loopback; 51 }; 52 53 int ks2_serdes_init(u32 base, struct ks2_serdes *serdes, u32 num_lanes); 54 55 #endif /* __TI_KEYSTONE_SERDES_H__ */ 56