1 /* 2 * Copyright (C) 2013 - ARM Ltd 3 * Author: Marc Zyngier <marc.zyngier@arm.com> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program. If not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 #ifndef __ARM_PSCI_H__ 19 #define __ARM_PSCI_H__ 20 21 /* PSCI 0.1 interface */ 22 #define ARM_PSCI_FN_BASE 0x95c1ba5e 23 #define ARM_PSCI_FN(n) (ARM_PSCI_FN_BASE + (n)) 24 25 #define ARM_PSCI_FN_CPU_SUSPEND ARM_PSCI_FN(0) 26 #define ARM_PSCI_FN_CPU_OFF ARM_PSCI_FN(1) 27 #define ARM_PSCI_FN_CPU_ON ARM_PSCI_FN(2) 28 #define ARM_PSCI_FN_MIGRATE ARM_PSCI_FN(3) 29 30 #define ARM_PSCI_RET_SUCCESS 0 31 #define ARM_PSCI_RET_NI (-1) 32 #define ARM_PSCI_RET_INVAL (-2) 33 #define ARM_PSCI_RET_DENIED (-3) 34 #define ARM_PSCI_RET_ALREADY_ON (-4) 35 #define ARM_PSCI_RET_ON_PENDING (-5) 36 #define ARM_PSCI_RET_INTERNAL_FAILURE (-6) 37 #define ARM_PSCI_RET_NOT_PRESENT (-7) 38 #define ARM_PSCI_RET_DISABLED (-8) 39 #define ARM_PSCI_RET_INVALID_ADDRESS (-9) 40 41 /* PSCI 0.2 interface */ 42 #define ARM_PSCI_0_2_FN_BASE 0x84000000 43 #define ARM_PSCI_0_2_FN(n) (ARM_PSCI_0_2_FN_BASE + (n)) 44 45 #define ARM_PSCI_0_2_FN_PSCI_VERSION ARM_PSCI_0_2_FN(0) 46 #define ARM_PSCI_0_2_FN_CPU_SUSPEND ARM_PSCI_0_2_FN(1) 47 #define ARM_PSCI_0_2_FN_CPU_OFF ARM_PSCI_0_2_FN(2) 48 #define ARM_PSCI_0_2_FN_CPU_ON ARM_PSCI_0_2_FN(3) 49 #define ARM_PSCI_0_2_FN_AFFINITY_INFO ARM_PSCI_0_2_FN(4) 50 #define ARM_PSCI_0_2_FN_MIGRATE ARM_PSCI_0_2_FN(5) 51 #define ARM_PSCI_0_2_FN_MIGRATE_INFO_TYPE ARM_PSCI_0_2_FN(6) 52 #define ARM_PSCI_0_2_FN_MIGRATE_INFO_UP_CPU ARM_PSCI_0_2_FN(7) 53 #define ARM_PSCI_0_2_FN_SYSTEM_OFF ARM_PSCI_0_2_FN(8) 54 #define ARM_PSCI_0_2_FN_SYSTEM_RESET ARM_PSCI_0_2_FN(9) 55 56 /* PSCI 1.0 interface */ 57 #define ARM_PSCI_1_0_FN_PSCI_FEATURES ARM_PSCI_0_2_FN(10) 58 #define ARM_PSCI_1_0_FN_CPU_FREEZE ARM_PSCI_0_2_FN(11) 59 #define ARM_PSCI_1_0_FN_CPU_DEFAULT_SUSPEND ARM_PSCI_0_2_FN(12) 60 #define ARM_PSCI_1_0_FN_NODE_HW_STATE ARM_PSCI_0_2_FN(13) 61 #define ARM_PSCI_1_0_FN_SYSTEM_SUSPEND ARM_PSCI_0_2_FN(14) 62 #define ARM_PSCI_1_0_FN_SET_SUSPEND_MODE ARM_PSCI_0_2_FN(15) 63 #define ARM_PSCI_1_0_FN_STAT_RESIDENCY ARM_PSCI_0_2_FN(16) 64 #define ARM_PSCI_1_0_FN_STAT_COUNT ARM_PSCI_0_2_FN(17) 65 66 /* 1KB stack per core */ 67 #define ARM_PSCI_STACK_SHIFT 10 68 #define ARM_PSCI_STACK_SIZE (1 << ARM_PSCI_STACK_SHIFT) 69 70 /* PSCI affinity level state returned by AFFINITY_INFO */ 71 #define PSCI_AFFINITY_LEVEL_ON 0 72 #define PSCI_AFFINITY_LEVEL_OFF 1 73 #define PSCI_AFFINITY_LEVEL_ON_PENDING 2 74 75 #ifndef __ASSEMBLY__ 76 #include <asm/types.h> 77 78 /* These 2 helper functions assume cpu < CONFIG_ARMV7_PSCI_NR_CPUS */ 79 u32 psci_get_target_pc(int cpu); 80 void psci_save_target_pc(int cpu, u32 pc); 81 82 void psci_cpu_entry(void); 83 u32 psci_get_cpu_id(void); 84 void psci_cpu_off_common(void); 85 86 int psci_update_dt(void *fdt); 87 void psci_board_init(void); 88 int fdt_psci(void *fdt); 89 #endif /* ! __ASSEMBLY__ */ 90 91 #endif /* __ARM_PSCI_H__ */ 92