1 /* 2 * (C) Copyright 2010 3 * Texas Instruments, <www.ti.com> 4 * Aneesh V <aneesh@ti.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 #ifndef _PL310_H_ 9 #define _PL310_H_ 10 11 #include <linux/types.h> 12 13 /* Register bit fields */ 14 #define PL310_AUX_CTRL_ASSOCIATIVITY_MASK (1 << 16) 15 #define L2X0_DYNAMIC_CLK_GATING_EN (1 << 1) 16 #define L2X0_STNDBY_MODE_EN (1 << 0) 17 #define L2X0_CTRL_EN 1 18 19 struct pl310_regs { 20 u32 pl310_cache_id; 21 u32 pl310_cache_type; 22 u32 pad1[62]; 23 u32 pl310_ctrl; 24 u32 pl310_aux_ctrl; 25 u32 pl310_tag_latency_ctrl; 26 u32 pl310_data_latency_ctrl; 27 u32 pad2[60]; 28 u32 pl310_event_cnt_ctrl; 29 u32 pl310_event_cnt1_cfg; 30 u32 pl310_event_cnt0_cfg; 31 u32 pl310_event_cnt1_val; 32 u32 pl310_event_cnt0_val; 33 u32 pl310_intr_mask; 34 u32 pl310_masked_intr_stat; 35 u32 pl310_raw_intr_stat; 36 u32 pl310_intr_clear; 37 u32 pad3[323]; 38 u32 pl310_cache_sync; 39 u32 pad4[15]; 40 u32 pl310_inv_line_pa; 41 u32 pad5[2]; 42 u32 pl310_inv_way; 43 u32 pad6[12]; 44 u32 pl310_clean_line_pa; 45 u32 pad7[1]; 46 u32 pl310_clean_line_idx; 47 u32 pl310_clean_way; 48 u32 pad8[12]; 49 u32 pl310_clean_inv_line_pa; 50 u32 pad9[1]; 51 u32 pl310_clean_inv_line_idx; 52 u32 pl310_clean_inv_way; 53 u32 pad10[64]; 54 u32 pl310_lockdown_dbase; 55 u32 pl310_lockdown_ibase; 56 u32 pad11[190]; 57 u32 pl310_addr_filter_start; 58 u32 pl310_addr_filter_end; 59 u32 pad12[190]; 60 u32 pl310_test_operation; 61 u32 pad13[3]; 62 u32 pl310_line_data; 63 u32 pad14[7]; 64 u32 pl310_line_tag; 65 u32 pad15[3]; 66 u32 pl310_debug_ctrl; 67 u32 pad16[7]; 68 u32 pl310_prefetch_ctrl; 69 u32 pad17[7]; 70 u32 pl310_power_ctrl; 71 }; 72 73 void pl310_inval_all(void); 74 void pl310_clean_inval_all(void); 75 void pl310_inval_range(u32 start, u32 end); 76 void pl310_clean_inval_range(u32 start, u32 end); 77 78 #endif 79