1 /* 2 * (C) Copyright 2010 3 * Texas Instruments, <www.ti.com> 4 * Aneesh V <aneesh@ti.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 #ifndef _PL310_H_ 9 #define _PL310_H_ 10 11 #include <linux/types.h> 12 13 /* Register bit fields */ 14 #define PL310_AUX_CTRL_ASSOCIATIVITY_MASK (1 << 16) 15 16 struct pl310_regs { 17 u32 pl310_cache_id; 18 u32 pl310_cache_type; 19 u32 pad1[62]; 20 u32 pl310_ctrl; 21 u32 pl310_aux_ctrl; 22 u32 pl310_tag_latency_ctrl; 23 u32 pl310_data_latency_ctrl; 24 u32 pad2[60]; 25 u32 pl310_event_cnt_ctrl; 26 u32 pl310_event_cnt1_cfg; 27 u32 pl310_event_cnt0_cfg; 28 u32 pl310_event_cnt1_val; 29 u32 pl310_event_cnt0_val; 30 u32 pl310_intr_mask; 31 u32 pl310_masked_intr_stat; 32 u32 pl310_raw_intr_stat; 33 u32 pl310_intr_clear; 34 u32 pad3[323]; 35 u32 pl310_cache_sync; 36 u32 pad4[15]; 37 u32 pl310_inv_line_pa; 38 u32 pad5[2]; 39 u32 pl310_inv_way; 40 u32 pad6[12]; 41 u32 pl310_clean_line_pa; 42 u32 pad7[1]; 43 u32 pl310_clean_line_idx; 44 u32 pl310_clean_way; 45 u32 pad8[12]; 46 u32 pl310_clean_inv_line_pa; 47 u32 pad9[1]; 48 u32 pl310_clean_inv_line_idx; 49 u32 pl310_clean_inv_way; 50 }; 51 52 void pl310_inval_all(void); 53 void pl310_clean_inval_all(void); 54 void pl310_inval_range(u32 start, u32 end); 55 void pl310_clean_inval_range(u32 start, u32 end); 56 57 #endif 58