xref: /openbmc/u-boot/arch/arm/include/asm/opcodes.h (revision cf0bcd7d)
1 /*
2  *  arch/arm/include/asm/opcodes.h
3  *
4  * SPDX-License-Identifier:	GPL-2.0
5  */
6 
7 #ifndef __ASM_ARM_OPCODES_H
8 #define __ASM_ARM_OPCODES_H
9 
10 #ifndef __ASSEMBLY__
11 #include <linux/linkage.h>
12 extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
13 #endif
14 
15 #define ARM_OPCODE_CONDTEST_FAIL   0
16 #define ARM_OPCODE_CONDTEST_PASS   1
17 #define ARM_OPCODE_CONDTEST_UNCOND 2
18 
19 
20 /*
21  * Assembler opcode byteswap helpers.
22  * These are only intended for use by this header: don't use them directly,
23  * because they will be suboptimal in most cases.
24  */
25 #define ___asm_opcode_swab32(x) (	\
26 	  (((x) << 24) & 0xFF000000)	\
27 	| (((x) <<  8) & 0x00FF0000)	\
28 	| (((x) >>  8) & 0x0000FF00)	\
29 	| (((x) >> 24) & 0x000000FF)	\
30 )
31 #define ___asm_opcode_swab16(x) (	\
32 	  (((x) << 8) & 0xFF00)		\
33 	| (((x) >> 8) & 0x00FF)		\
34 )
35 #define ___asm_opcode_swahb32(x) (	\
36 	  (((x) << 8) & 0xFF00FF00)	\
37 	| (((x) >> 8) & 0x00FF00FF)	\
38 )
39 #define ___asm_opcode_swahw32(x) (	\
40 	  (((x) << 16) & 0xFFFF0000)	\
41 	| (((x) >> 16) & 0x0000FFFF)	\
42 )
43 #define ___asm_opcode_identity32(x) ((x) & 0xFFFFFFFF)
44 #define ___asm_opcode_identity16(x) ((x) & 0xFFFF)
45 
46 
47 /*
48  * Opcode byteswap helpers
49  *
50  * These macros help with converting instructions between a canonical integer
51  * format and in-memory representation, in an endianness-agnostic manner.
52  *
53  * __mem_to_opcode_*() convert from in-memory representation to canonical form.
54  * __opcode_to_mem_*() convert from canonical form to in-memory representation.
55  *
56  *
57  * Canonical instruction representation:
58  *
59  *	ARM:		0xKKLLMMNN
60  *	Thumb 16-bit:	0x0000KKLL, where KK < 0xE8
61  *	Thumb 32-bit:	0xKKLLMMNN, where KK >= 0xE8
62  *
63  * There is no way to distinguish an ARM instruction in canonical representation
64  * from a Thumb instruction (just as these cannot be distinguished in memory).
65  * Where this distinction is important, it needs to be tracked separately.
66  *
67  * Note that values in the range 0x0000E800..0xE7FFFFFF intentionally do not
68  * represent any valid Thumb-2 instruction.  For this range,
69  * __opcode_is_thumb32() and __opcode_is_thumb16() will both be false.
70  *
71  * The ___asm variants are intended only for use by this header, in situations
72  * involving inline assembler.  For .S files, the normal __opcode_*() macros
73  * should do the right thing.
74  */
75 #ifdef __ASSEMBLY__
76 
77 #define ___opcode_swab32(x) ___asm_opcode_swab32(x)
78 #define ___opcode_swab16(x) ___asm_opcode_swab16(x)
79 #define ___opcode_swahb32(x) ___asm_opcode_swahb32(x)
80 #define ___opcode_swahw32(x) ___asm_opcode_swahw32(x)
81 #define ___opcode_identity32(x) ___asm_opcode_identity32(x)
82 #define ___opcode_identity16(x) ___asm_opcode_identity16(x)
83 
84 #else /* ! __ASSEMBLY__ */
85 
86 #include <linux/types.h>
87 #include <linux/swab.h>
88 
89 #define ___opcode_swab32(x) swab32(x)
90 #define ___opcode_swab16(x) swab16(x)
91 #define ___opcode_swahb32(x) swahb32(x)
92 #define ___opcode_swahw32(x) swahw32(x)
93 #define ___opcode_identity32(x) ((u32)(x))
94 #define ___opcode_identity16(x) ((u16)(x))
95 
96 #endif /* ! __ASSEMBLY__ */
97 
98 
99 #ifdef CONFIG_CPU_ENDIAN_BE8
100 
101 #define __opcode_to_mem_arm(x) ___opcode_swab32(x)
102 #define __opcode_to_mem_thumb16(x) ___opcode_swab16(x)
103 #define __opcode_to_mem_thumb32(x) ___opcode_swahb32(x)
104 #define ___asm_opcode_to_mem_arm(x) ___asm_opcode_swab32(x)
105 #define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_swab16(x)
106 #define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahb32(x)
107 
108 #else /* ! CONFIG_CPU_ENDIAN_BE8 */
109 
110 #define __opcode_to_mem_arm(x) ___opcode_identity32(x)
111 #define __opcode_to_mem_thumb16(x) ___opcode_identity16(x)
112 #define ___asm_opcode_to_mem_arm(x) ___asm_opcode_identity32(x)
113 #define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_identity16(x)
114 #ifndef CONFIG_CPU_ENDIAN_BE32
115 /*
116  * On BE32 systems, using 32-bit accesses to store Thumb instructions will not
117  * work in all cases, due to alignment constraints.  For now, a correct
118  * version is not provided for BE32.
119  */
120 #define __opcode_to_mem_thumb32(x) ___opcode_swahw32(x)
121 #define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahw32(x)
122 #endif
123 
124 #endif /* ! CONFIG_CPU_ENDIAN_BE8 */
125 
126 #define __mem_to_opcode_arm(x) __opcode_to_mem_arm(x)
127 #define __mem_to_opcode_thumb16(x) __opcode_to_mem_thumb16(x)
128 #ifndef CONFIG_CPU_ENDIAN_BE32
129 #define __mem_to_opcode_thumb32(x) __opcode_to_mem_thumb32(x)
130 #endif
131 
132 /* Operations specific to Thumb opcodes */
133 
134 /* Instruction size checks: */
135 #define __opcode_is_thumb32(x) (		\
136 	   ((x) & 0xF8000000) == 0xE8000000	\
137 	|| ((x) & 0xF0000000) == 0xF0000000	\
138 )
139 #define __opcode_is_thumb16(x) (					\
140 	   ((x) & 0xFFFF0000) == 0					\
141 	&& !(((x) & 0xF800) == 0xE800 || ((x) & 0xF000) == 0xF000)	\
142 )
143 
144 /* Operations to construct or split 32-bit Thumb instructions: */
145 #define __opcode_thumb32_first(x) (___opcode_identity16((x) >> 16))
146 #define __opcode_thumb32_second(x) (___opcode_identity16(x))
147 #define __opcode_thumb32_compose(first, second) (			\
148 	  (___opcode_identity32(___opcode_identity16(first)) << 16)	\
149 	| ___opcode_identity32(___opcode_identity16(second))		\
150 )
151 #define ___asm_opcode_thumb32_first(x) (___asm_opcode_identity16((x) >> 16))
152 #define ___asm_opcode_thumb32_second(x) (___asm_opcode_identity16(x))
153 #define ___asm_opcode_thumb32_compose(first, second) (			    \
154 	  (___asm_opcode_identity32(___asm_opcode_identity16(first)) << 16) \
155 	| ___asm_opcode_identity32(___asm_opcode_identity16(second))	    \
156 )
157 
158 /*
159  * Opcode injection helpers
160  *
161  * In rare cases it is necessary to assemble an opcode which the
162  * assembler does not support directly, or which would normally be
163  * rejected because of the CFLAGS or AFLAGS used to build the affected
164  * file.
165  *
166  * Before using these macros, consider carefully whether it is feasible
167  * instead to change the build flags for your file, or whether it really
168  * makes sense to support old assembler versions when building that
169  * particular kernel feature.
170  *
171  * The macros defined here should only be used where there is no viable
172  * alternative.
173  *
174  *
175  * __inst_arm(x): emit the specified ARM opcode
176  * __inst_thumb16(x): emit the specified 16-bit Thumb opcode
177  * __inst_thumb32(x): emit the specified 32-bit Thumb opcode
178  *
179  * __inst_arm_thumb16(arm, thumb): emit either the specified arm or
180  *	16-bit Thumb opcode, depending on whether an ARM or Thumb-2
181  *	kernel is being built
182  *
183  * __inst_arm_thumb32(arm, thumb): emit either the specified arm or
184  *	32-bit Thumb opcode, depending on whether an ARM or Thumb-2
185  *	kernel is being built
186  *
187  *
188  * Note that using these macros directly is poor practice.  Instead, you
189  * should use them to define human-readable wrapper macros to encode the
190  * instructions that you care about.  In code which might run on ARMv7 or
191  * above, you can usually use the __inst_arm_thumb{16,32} macros to
192  * specify the ARM and Thumb alternatives at the same time.  This ensures
193  * that the correct opcode gets emitted depending on the instruction set
194  * used for the kernel build.
195  *
196  * Look at opcodes-virt.h for an example of how to use these macros.
197  */
198 #include <linux/stringify.h>
199 
200 #define __inst_arm(x) ___inst_arm(___asm_opcode_to_mem_arm(x))
201 #define __inst_thumb32(x) ___inst_thumb32(				\
202 	___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_first(x)),	\
203 	___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_second(x))	\
204 )
205 #define __inst_thumb16(x) ___inst_thumb16(___asm_opcode_to_mem_thumb16(x))
206 
207 #ifdef CONFIG_THUMB2_KERNEL
208 #define __inst_arm_thumb16(arm_opcode, thumb_opcode) \
209 	__inst_thumb16(thumb_opcode)
210 #define __inst_arm_thumb32(arm_opcode, thumb_opcode) \
211 	__inst_thumb32(thumb_opcode)
212 #else
213 #define __inst_arm_thumb16(arm_opcode, thumb_opcode) __inst_arm(arm_opcode)
214 #define __inst_arm_thumb32(arm_opcode, thumb_opcode) __inst_arm(arm_opcode)
215 #endif
216 
217 /* Helpers for the helpers.  Don't use these directly. */
218 #ifdef __ASSEMBLY__
219 #define ___inst_arm(x) .long x
220 #define ___inst_thumb16(x) .short x
221 #define ___inst_thumb32(first, second) .short first, second
222 #else
223 #define ___inst_arm(x) ".long " __stringify(x) "\n\t"
224 #define ___inst_thumb16(x) ".short " __stringify(x) "\n\t"
225 #define ___inst_thumb32(first, second) \
226 	".short " __stringify(first) ", " __stringify(second) "\n\t"
227 #endif
228 
229 #endif /* __ASM_ARM_OPCODES_H */
230